Electronic device for performing clock management by using clock counters allocated at different power domains and associated method

    公开(公告)号:US12282352B2

    公开(公告)日:2025-04-22

    申请号:US18139939

    申请日:2023-04-26

    Abstract: An electronic device includes a first circuit block and a second circuit block. The first circuit block is allocated in a first power domain, and includes a first clock counter and an updating circuit. The first clock counter is arranged to generate a first counter value according to a first reference clock. The updating circuit is arranged to receive a second counter value, and update the first counter value according to the second counter value. The second circuit block is allocated in a second power domain, and includes a second clock counter arranged to generate the second counter value according to a second reference clock. The first power domain and the second power domain are controlled independently.

    ELECTRONIC DEVICE FOR PERFORMING CLOCK MANAGEMENT BY USING CLOCK COUNTERS ALLOCATED AT DIFFERENT POWER DOMAINS AND ASSOCIATED METHOD

    公开(公告)号:US20240361798A1

    公开(公告)日:2024-10-31

    申请号:US18139939

    申请日:2023-04-26

    CPC classification number: G06F1/08

    Abstract: An electronic device includes a first circuit block and a second circuit block. The first circuit block is allocated in a first power domain, and includes a first clock counter and an updating circuit. The first clock counter is arranged to generate a first counter value according to a first reference clock. The updating circuit is arranged to receive a second counter value, and update the first counter value according to the second counter value. The second circuit block is allocated in a second power domain, and includes a second clock counter arranged to generate the second counter value according to a second reference clock. The first power domain and the second power domain are controlled independently.

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