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公开(公告)号：US09577660B1
公开(公告)日：2017-02-21
申请号：US15239920
申请日：2016-08-18
Applicant: Airoha Technology Corp.
Inventor： Yu-Hsuan Kang
CPC classification number: H03M1/46 , H03M1/1245
Abstract: Successive approximation ADC includes a digital-to-analog converter, a comparator, a comparison unit, a timing unit and a control logic circuit. The digital-to-analog converter converts a digital signal to a reference analog signal. The comparator compares an analog input signal with a reference analog voltage and generates a comparing signal. The comparison unit generates a comparison result signal according to the comparing signal. The timing unit generates a clock signal, and sequentially enables N supplementary clock signals corresponding to N bits when the comparison result signal is enabled. The control logic circuit updates the digital signal according to the comparing signal, and generates N bits of digital value sequentially from the most significant bit to the least significant bit, and then determines whether the digital value is valid according to whether the Nth supplementary clock signal corresponding to the least significant bit is enabled.
Abstract translation: 逐次逼近ADC包括数模转换器，比较器，比较单元，定时单元和控制逻辑电路。 数模转换器将数字信号转换为参考模拟信号。 比较器将模拟输入信号与参考模拟电压进行比较，并产生比较信号。 比较单元根据比较信号生成比较结果信号。 定时单元产生时钟信号，并且当比较结果信号被使能时，顺序启动对应于N位的N个辅助时钟信号。 控制逻辑电路根据比较信号更新数字信号，并从最高有效位顺序生成数字值N位到最低有效位，然后根据第N个辅助时钟信号是否确定数字值是否有效 对应于最低有效位被使能。
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公开(公告)号：US10211837B2
公开(公告)日：2019-02-19
申请号：US15405494
申请日：2017-01-13
Applicant: Airoha Technology Corp.
Inventor： Yu-Hsuan Kang
Abstract: A frequency divider and a control method thereof are provided. The frequency divider includes a phase selector and a control circuit. The phase selector receives N input signals, and selects a first input signal from the N input signals as an output signal according to N selection signals. The frequency of the N input signals are the same, and the phase of the N input signals are different, and every adjacent two of the N input signals have a phase difference of 360°/N, wherein N is a positive integer larger than 2. The control circuit updates the N selection signals according to the output signal, such that the phase selector switches the output signal from the first input signal to a second input signal of the N input signals, wherein the phase of the second input signal leads the phase of the first input signal by 360°/N.
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公开(公告)号：US20170207788A1
公开(公告)日：2017-07-20
申请号：US15405494
申请日：2017-01-13
Applicant: Airoha Technology Corp.
Inventor： Yu-Hsuan Kang
Abstract: A frequency divider and a control method thereof are provided. The frequency divider includes a phase selector and a control circuit. The phase selector receives N input signals, and selects a first input signal from the N input signals as an output signal according to N selection signals. The frequency of the N input signals are the same, and the phase of the N input signals are different, and every adjacent two of the N input signals have a phase difference of 360°/N, wherein N is a positive integer larger than 2. The control circuit updates the N selection signals according to the output signal, such that the phase selector switches the output signal from the first input signal to a second input signal of the N input signals, wherein the phase of the second input signal leads the phase of the first input signal by 360°/N.
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公开(公告)号：US20170207757A1
公开(公告)日：2017-07-20
申请号：US15405465
申请日：2017-01-13
Applicant: Airoha Technology Corp.
Inventor： Yu-Hsuan Kang
CPC classification number: H03F3/005 , H03F3/45475 , H03F2203/45116 , H03F2203/45514 , H03F2203/45551
Abstract: A switched-capacitor circuit is provided in the present disclosure. The switched-capacitor circuit includes a first capacitor, a first switch, an amplifier circuit, a second switch, and a second capacitor. The first capacitor includes a first end and a second end. The first switch is coupled between an input end and the first end of the first capacitor. The amplifier circuit includes a first input end, a second input end and an output end. The second switch is coupled between the second end of the first capacitor and the first input end of the amplifier circuit. The second capacitor is coupled between the first capacitor and a ground end. Wherein in a first cycle, the first switch is turned on and the second switch is turned off. And in a second cycle, the first switch is turned off and the second switch is turned on.
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