公开(公告)号：US20190097784A1

公开(公告)日：2019-03-28

申请号：US16154513

申请日：2018-10-08

Applicant: Altera Corporation

Inventor： Boon Hong Oh ,  Chee Sent Tan ,  Chau Perng Chin

IPC: H04L7/00 ,  H03L7/00 ,  H04L7/033

Abstract: Techniques to operate circuitry in an integrated circuit are provided. The circuitry may include rate detection circuitry, receiver circuitry, and configuration circuitry. The receiver circuitry may receive a data stream with an arbitrary data rate. The rate detection circuitry may receive a reference clock signal that is associated with the received data stream. The rate detection circuitry determines the frequency of the reference clock signal such that an appropriate clock signal may be generated for the receiver circuitry. The receiver clock signal may be generated by clock generation circuitry that is coupled to the rate detection circuitry. The configuration circuitry may accordingly configure the receiver circuitry based at least on the determined frequency of the reference clock signal so that the receiver circuitry may operate at the arbitrary data rate.

公开(公告)号：US09559834B1

公开(公告)日：2017-01-31

申请号：US14605871

申请日：2015-01-26

Applicant: Altera Corporation

Inventor： Boon Hong Oh ,  Chee Sent Tan ,  Chau Perng Chin

IPC: H03D3/24 ,  H04L7/00 ,  H04L7/033 ,  H03L7/08

CPC classification number: H03L7/00

Abstract: Techniques to operate circuitry in an integrated circuit are provided. The circuitry may include rate detection circuitry, receiver circuitry, and configuration circuitry. The receiver circuitry may receive a data stream with an arbitrary data rate. The rate detection circuitry may receive a reference clock signal that is associated with the received data stream. The rate detection circuitry determines the frequency of the reference clock signal such that an appropriate clock signal may be generated for the receiver circuitry. The receiver clock signal may be generated by clock generation circuitry that is coupled to the rate detection circuitry. The configuration circuitry may accordingly configure the receiver circuitry based at least on the determined frequency of the reference clock signal so that the receiver circuitry may operate at the arbitrary data rate.

Abstract translation: 提供了在集成电路中操作电路的技术。 电路可以包括速率检测电路，接收器电路和配置电路。 接收机电路可以接收具有任意数据速率的数据流。 速率检测电路可以接收与所接收的数据流相关联的参考时钟信号。 速率检测电路确定参考时钟信号的频率，使得可以为接收机电路产生适当的时钟信号。 接收机时钟信号可以由耦合到速率检测电路的时钟产生电路产生。 因此，配置电路可以至少基于所确定的参考时钟信号的频率来配置接收机电路，使得接收机电路可以以任意数据速率工作。