公开(公告)号：US09613829B1

公开(公告)日：2017-04-04

申请号：US15148895

申请日：2016-05-06

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L29/84 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L21/56

CPC classification number: H01L23/49861 ,  H01L21/4839 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

公开(公告)号：US20170207162A1

公开(公告)日：2017-07-20

申请号：US15477853

申请日：2017-04-03

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49861 ,  H01L21/4839 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

公开(公告)号：US20200273789A1

公开(公告)日：2020-08-27

申请号：US16673032

申请日：2019-11-04

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

公开(公告)号：US10468343B2

公开(公告)日：2019-11-05

申请号：US15874602

申请日：2018-01-18

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

公开(公告)号：US20180145019A1

公开(公告)日：2018-05-24

申请号：US15874602

申请日：2018-01-18

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49861 ,  H01L21/4839 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

公开(公告)号：US09881864B2

公开(公告)日：2018-01-30

申请号：US15477853

申请日：2017-04-03

Applicant: Amkor Technology, Inc.

Inventor： Seung Woo Lee ,  Byong Jin Kim ,  Won Bae Bang ,  Sang Goo Kang

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/49861 ,  H01L21/4839 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.