公开(公告)号：US06512396B1

公开(公告)日：2003-01-28

申请号：US09322497

申请日：1999-05-28

Applicant: Andrew R. Berding

Inventor： Andrew R. Berding

IPC: H05K114

CPC classification number: G06F13/4077

Abstract: A backplane of a data processing system is configured to include a current boost circuit for each net. The boost circuit is coupled to a common point for the net and is triggered to provide a boost current in response to a detected change in a signal on the net. The boost circuit has the capacity to provide a considerably larger drive current than does the conventional driver on the circuit board connected to the backplane. Thus when a conventional driver starts to drive a signal on the net from one logic state to the other, the boost circuit detects the initiation of change and supplies a boost current to cause a rapid change in logic state. Preferably each terminal on the net is coupled to the common point by a trace which includes both a highly conductive portion and a portion including a damping impedance. The damping impedance is chosen to approximate the characteristic impedance of the trace coupling the terminal to the common point and the associated loading of that trace.

Abstract translation: 数据处理系统的背板被配置为包括用于每个网络的当前升压电路。 升压电路耦合到网络的公共点，并且被触发以响应于检测到的网络上的信号的改变来提供升压电流。 升压电路具有比连接到背板的电路板上的常规驱动器提供相当大的驱动电流的能力。 因此，当常规驱动器开始将网络上的信号从一个逻辑状态驱动到另一个逻辑状态时，升压电路检测到变化的启动并提供升压电流以引起逻辑状态的快速变化。 优选地，网上的每个端子通过包括高导电部分和包括阻尼阻抗的部分的迹线耦合到公共点。 选择阻尼阻抗来近似将端子耦合到公共点的迹线的特性阻抗以及该迹线的相关负载。

公开(公告)号：US5930119A

公开(公告)日：1999-07-27

申请号：US31179

申请日：1998-02-26

Applicant: Andrew R. Berding

Inventor： Andrew R. Berding

IPC: H05K1/02 ,  H05K1/14 ,  H05K3/46 ,  H05K7/14

CPC classification number: H05K1/0248 ,  H05K1/0216 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09254 ,  H05K2201/09727

Abstract: A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. A set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The inductance of longer traces is reduced by merging traces near a central portion of the backplane to form a conductive region that extends to at least one connector on either side of the common points, thereby electrically shortening the longer traces. The inductance is further reduced by widening the longer traces. Longer traces are wider than shorter traces to reduce the differences in the LC products associated with each trace and, therefore, the differences in delay among the traces.

Abstract translation: 数据处理系统包括通过多个连接器连接到背板的背板和多个逻辑板。 一组公共点通过每个公共点和连接器的相应引脚之间的各个导电迹线电耦合到连接器。 通过在背板的中心部分附近合并迹线来形成较长迹线的电感，以形成延伸到公共点两侧的至少一个连接器的导电区域，从而电气缩短较长的迹线。 通过加宽更长的走线来进一步减小电感。 较长的迹线比较短的迹线更宽，以减少与每个迹线相关联的LC产物的差异，并因此减少迹线之间的延迟差异。

公开(公告)号：US5696667A

公开(公告)日：1997-12-09

申请号：US632648

申请日：1996-04-15

Applicant: Andrew R. Berding

Inventor： Andrew R. Berding

IPC: H05K1/02 ,  H05K1/14 ,  H05K7/14

CPC classification number: H05K1/0248 ,  H05K1/0216 ,  H05K7/1459 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09254 ,  H05K2201/09263

Abstract: A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. In one embodiment of the invention, a set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The common points are preferably centrally located among the plurality of connectors to reduce propagation delay. A connector can be attached at the common points. The traces are separated from each other by lateral displacement in a single plane. If the backplane is a multi-layered printed circuit board, the traces are separated from each other by vertical displacement between the layers of the printed circuit board or by both vertical and horizontal displacement. The traces to the connectors nearest the common points have a minimum length greater than the distance between the nearest connectors and the common points.

Abstract translation: 数据处理系统包括通过多个连接器连接到背板的背板和多个逻辑板。 在本发明的一个实施例中，一组公共点通过在每个公共点和连接器的相应引脚之间的各个导电迹线电耦合到连接器。 公共点优选地位于多个连接器之间，以减少传播延迟。 连接器可以连接在公共点。 通过在单个平面中的横向位移，迹线彼此分离。 如果背板是多层印刷电路板，则通过印刷电路板的层之间的垂直位移或垂直和水平位移两者彼此分开。 到最接近公共点的连接器的迹线的最小长度大于最近连接器和公共点之间的距离。