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公开(公告)号：US20250093937A1
公开(公告)日：2025-03-20
申请号：US18540798
申请日：2023-12-14
Applicant: Apple Inc.
Inventor： Doron Rajwan , John H. Kelm , Michael Bekerman
IPC: G06F1/3234
Abstract: A system includes a power management processor that may be configured to monitor operation of one or more circuit blocks in the system, and to determine a particular performance state of a set of performance states for one or more power domains in the system based on the monitored operation. The system further includes a performance management circuit that may be configured to receive, from the power management processor, an indication of the particular performance state. The performance management circuit may further be configured to determine a transition path from a current performance state to the particular performance state that avoids illegal performance state transitions, and to cause a control circuit to transition to the particular performance state using the transition path.
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公开(公告)号：US20250093925A1
公开(公告)日：2025-03-20
申请号：US18540723
申请日：2023-12-14
Applicant: Apple Inc.
Inventor： Doron Rajwan , John H. Kelm , Josh P. de Cesare , Karl D. Wulcan , Michael Bekerman
IPC: G06F1/26
Abstract: An apparatus includes a control circuit, configured to transition a plurality of power domains into selected performance states, and a set of state request registers. A state request register may include fields that are associated with respective power domains. The apparatus may further include circuit blocks configured to store respective state request values into respective state request registers. A given state request value may indicate a requested performance state for at least one of the power domains. In addition, a performance management circuit may be configured to select, using the associated fields in the registers, a particular performance state for at least one of the power domains. The performance management circuit may be further configured to determine a transition path to sequence to the selected performance state, and to cause the control circuit to transition to the selected performance state using the transition path.
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公开(公告)号：US20240160267A1
公开(公告)日：2024-05-16
申请号：US18510525
申请日：2023-11-15
Applicant: Apple Inc.
Inventor： Doron Rajwan , Karl Daniel Wulcan , Lital Levy-Rubin , Tal Kuzi
IPC: G06F1/3206 , G06F11/30 , G06F11/34
CPC classification number: G06F1/3206 , G06F11/3003 , G06F11/3062 , G06F11/3495
Abstract: Systems, apparatuses, and methods for implementing telemetry push aggregation techniques are described. A computing system includes one or more input/output (I/O) agents interposed between functional units and a communication fabric. A given I/O agent receives a set of aggregation rules from a power management unit. The I/O agent monitors traffic from the functional units, and the I/O agent generates telemetry data from the traffic data based on the set of aggregation rules. The telemetry data is used by the power management unit to make adjustments to one or more power settings.
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公开(公告)号：US11822399B2
公开(公告)日：2023-11-21
申请号：US17387376
申请日：2021-07-28
Applicant: Apple Inc.
Inventor： Doron Rajwan , Tal Kuzi , Keith Cox , Yizhang Yang
CPC classification number: G06F1/206 , G06F1/08 , G06F11/3058
Abstract: A temperature control apparatus is disclosed. An integrated circuit (IC) includes a plurality of temperature sensors, a first thermal control loop, and a second thermal control loop. The first thermal control loop is configured to control temperature of the IC by reducing a frequency of a clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a first temperature threshold. The second thermal control loop is configured to control temperature of the IC by dithering the clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a second temperature threshold that is greater than the first temperature threshold.
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公开(公告)号：US20230281154A1
公开(公告)日：2023-09-07
申请号：US17683396
申请日：2022-03-01
Applicant: Apple Inc.
Inventor： Doron Rajwan , Lior Zimet , Sagi Lahav
CPC classification number: G06F15/7807 , G06F13/4013
Abstract: An electronic device includes circuitry and a plurality of ports. The plurality of ports includes an input port and an output port, configured to communicate data units with one or more other devices across a fabric of a System on a Chip (SoC), the data units include N data bits, N being an integer larger than 1. The circuitry is configured to receive an input data unit via the input port, to make a random decision of whether to invert the N data bits in the input data unit, to produce an output data unit by retaining or inverting the N data bits of the input data unit based on the random decision, and to send the output data unit via the output port.
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Patent Agency Ranking
公开(公告)号：US10911267B1
公开(公告)日：2021-02-02
申请号：US16845865
申请日：2020-04-10
Applicant: Apple Inc.
Inventor： Luca O. Iuliano , Doron Rajwan , Ali Rabbani Rankouhi
Abstract: An apparatus includes an encoding circuit, and a communication bus having conductive traces configured to transfer a data payload, including a control signal and up to a maximum number of data words. The encoding circuit is configured to receive an uncompressed data payload and a mask value, and to create, using the mask value, the control signal, the control signal indicative of whether the uncompressed data payload includes one or more non-enabled data words. In response to a determination that the control signal indicates that the uncompressed data payload includes one or more non-enabled data words, the encoding circuit is configured to create a compressed data payload from the uncompressed data payload, and to send, to a decoding circuit, the compressed data payload and the control signal via the plurality of conductive traces of the communication bus. The compressed data payload includes the mask value.
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公开(公告)号：US12228989B2
公开(公告)日：2025-02-18
申请号：US18522324
申请日：2023-11-29
Applicant: Apple Inc.
Inventor： Doron Rajwan , Ami Schwartzman , Lior Zimet
IPC: G06F1/28
Abstract: A system includes multiple hardware circuits and protection circuitry. The multiple hardware circuits are coupled to respective power domains having respective sets of domain-specific power settings. The protection circuitry is configured to monitor requests in which one or more of the hardware circuits request transitions between the domain-specific power settings, to determine, from among multiple system-level combinations of the domain-specific power settings, a subset of system-level combinations that could potentially be traversed in performing the requested transitions, and to initiate a responsive action upon detecting that any of the system-level combinations in the subset is specified as invalid.
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公开(公告)号：US20250044844A1
公开(公告)日：2025-02-06
申请号：US18365783
申请日：2023-08-04
Applicant: Apple Inc.
Inventor： Doron Rajwan , Alexander Gendler , Daniel U. Becker , Saher Odeh , Ilya Granovsky , Lior Zimet
IPC: G06F1/26
Abstract: Techniques are disclosed relating to selective rate limiting and reducing clock frequency of fabric circuitry in response to certain power management events. Disclosed techniques may advantageously allow power management circuitry to reduce or avoid negative impacts of power events by reducing the clock frequency of a communication fabric while using rate limiting of relatively lower-priority traffic to reduce impacts of the frequency reduction on high-priority traffic. For example, rate limiting of lower-quality-of-service virtual channels may continue after recovery of the clock frequency until higher-quality-of-service virtual channels have recovered from the frequency reduction.
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公开(公告)号：US12197268B2
公开(公告)日：2025-01-14
申请号：US17573274
申请日：2022-01-11
Applicant: Apple Inc.
Inventor： Doron Rajwan , Inder M. Sodhi , Keith Cox , Jung Wook Cho , Kevin I. Park , Tal Kuzi
IPC: G06F1/3234 , G06F1/3206
Abstract: In an embodiment, a system may include a plurality of component circuits. The plurality of component circuits may include rate control circuits the control power consumption in the component circuits based on indications of power allocated to the component circuits. In an embodiment, the rate control circuits may transmit power requests for the component circuits and a floor request representing a minimum amount of power that may ensure reliable operation.
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公开(公告)号：US20240201766A1
公开(公告)日：2024-06-20
申请号：US18522324
申请日：2023-11-29
Applicant: Apple Inc.
Inventor： Doron Rajwan , Ami Schwartzman , Lior Zimet
IPC: G06F1/28
CPC classification number: G06F1/28
Abstract: A system includes multiple hardware circuits and protection circuitry. The multiple hardware circuits are coupled to respective power domains having respective sets of domain-specific power settings. The protection circuitry is configured to monitor requests in which one or more of the hardware circuits request transitions between the domain-specific power settings, to determine, from among multiple system-level combinations of the domain-specific power settings, a subset of system-level combinations that could potentially be traversed in performing the requested transitions, and to initiate a responsive action upon detecting that any of the system-level combinations in the subset is specified as invalid.
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