公开(公告)号：US20240046966A1

公开(公告)日：2024-02-08

申请号：US18366903

申请日：2023-08-08

Applicant: Applied Materials, Inc.

Inventor： Hsiang Yu Lee ,  Pradeep K. Subrahmanyan ,  Takaya Matsushita ,  Changwoo Sun

IPC: G11C5/06 ,  H10B43/20 ,  H10B43/35

CPC classification number: G11C5/063 ,  H10B43/20 ,  H10B43/35

Abstract: A three-dimensional (3D) NAND memory structure may include material layers arranged in a vertical stack including alternating horizontal insulating layers and wordline layers. The material layers may be etched to form a landing pad. A vertical wordline may extend through one or more of the horizontal wordline layers beneath the landing pad. The vertical wordline may be conductively connected to a top horizontal wordline, and the vertical wordline may be insulated from any of the horizontal wordlines that the vertical wordline extends through beneath the top horizontal wordline. A liner may also be formed over a top horizontal wordline at the landing pad.

公开(公告)号：US20240055269A1

公开(公告)日：2024-02-15

申请号：US17886285

申请日：2022-08-11

Applicant: Applied Materials, Inc.

Inventor： Sankuei Lin ,  Changwoo Sun ,  Pradeep K. Subrahmanyan

IPC: H01L21/311 ,  H01L27/115

CPC classification number: H01L21/31116 ,  H01L27/115 ,  H01L21/31144

Abstract: A three-dimensional (3D) NAND memory structure may include alternating layers of materials arranged in a vertical stack on a silicon substrate, such as alternating oxide and nitride layers. The alternating nitride layers may later be removed, and the recesses may be filled with a conductive material to form word lines for the memory array. To avoid pinching off these recesses with silicon byproducts from a traditional wet etch, a dry etch may be instead be used to remove the nitrite layers. To protect the silicon substrate, a first insulating layer may be deposited at the bottom of the slit to cover the exposed silicon substrate before performing the dry etch. After applying a second insulating layer to cover the alternating oxide/nitride layers, a directional etch may punch through both insulating layers to again expose the silicon substrate before applying a solid material fill in the slit.