公开(公告)号：US20250054737A1

公开(公告)日：2025-02-13

申请号：US18231655

申请日：2023-08-08

Applicant: Applied Materials, Inc.

Inventor： Karthik ELUMALAI ,  Ananthkrishna JUPUDI ,  Arunkumar TATTI ,  Cheng SUN ,  Ye LIU

IPC: H01J37/32

Abstract: Embodiments of substrate supports having electrostatic chucks (ESCs) for use in substrate process chambers are provided herein. In some embodiments, a substrate support includes: an electrostatic chuck (ESC) having a top surface and a plurality of mesas extending upward from the top surface, wherein an upper surface of the plurality of mesas define a substrate support surface, wherein a total surface area of the substrate support surface is about 18 to about 40 percent a total surface area of the upper surface, and wherein the ESC includes a plurality of backside gas openings extending through the ESC; and one or more chucking electrodes disposed in the ESC.

公开(公告)号：US20240213028A1

公开(公告)日：2024-06-27

申请号：US18086150

申请日：2022-12-21

Applicant: Applied Materials, Inc.

Inventor： Guan Huei SEE ,  ChangBum YONG ,  Prayudi LIANTO ,  Cheng SUN ,  Arvind SUNDARRAJAN

IPC: H01L21/3065

CPC classification number: H01L21/3065

Abstract: A method of thinning a die engaged with a substrate is disclosed, utilizing dry etching of a top surface of the die with a plasma comprising fluorine to selectively remove the top surface of the die relative to a top surface of the substrate.

公开(公告)号：US20250062129A1

公开(公告)日：2025-02-20

申请号：US18450466

申请日：2023-08-16

Applicant: Applied Materials, Inc.

Inventor： Yin Wei LIM ,  Guan Huei SEE ,  Chang Bum YONG ,  Prayudi LIANTO ,  Arvind SUNDARRAJAN ,  Cheng SUN

IPC: H01L21/3065 ,  H01L23/00 ,  H01L25/065

Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.

公开(公告)号：US20240266220A1

公开(公告)日：2024-08-08

申请号：US18105390

申请日：2023-02-03

Applicant: Applied Materials, Inc.

Inventor： Jonathan Bryant MELLEN ,  Clinton GOH ,  Cheng SUN

IPC: H01L21/78 ,  B23K26/38 ,  B23K26/40 ,  H01J37/32 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/67 ,  H01L23/544

CPC classification number: H01L21/78 ,  B23K26/38 ,  B23K26/40 ,  H01J37/32743 ,  H01J37/32899 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/67167 ,  H01L21/67207 ,  H01L23/544 ,  H01J2237/022 ,  H01J2237/334 ,  H01L2223/5446

Abstract: A method for dicing a die from a substrate for bonding that leverages laser and multiple etch processes. The method may include performing a laser cutting process to form a cut that removes a first portion of a dicing street in the substrate, performing a first plasma etch process to increase the laser kerf width to a first plasma etch width that is less than a dicing street width and to remove any non-silicon material from a bottom of the cut, and performing a second plasma etch process to increase the first plasma etch width to the dicing street width and to remove any remaining portion of the dicing street to completely separate the die from the substrate.