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    Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
    2.
    发明授权
    Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system 有权

    公开(公告)号：US10372643B1

    公开(公告)日：2019-08-06

    申请号：US16056563

    申请日：2018-08-07

    Applicant: BITMICRO LLC

    Inventor： Cyrill C. Ponce ,  Marizonne O. Fuentes ,  Gianico G. Noble

    IPC: G06F13/00 ,  G06F13/37 ,  G06F3/06 ,  G06F13/28

    Abstract: In an embodiment of the invention, a method comprises: A method, comprising: issuing, by a Direct Memory Access (DMA) engine, an update request to a dependency table if the DMA engine has finished executing a first descriptor; and issuing, by the DMA engine, a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the subindex is in the dependency table. In another embodiment of the invention, an apparatus comprises: a Direct Memory Access (DMA) engine configured to issue an update request to a dependency table if the DMA engine has finished executing a first descriptor, and configured to issue a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the subindex is in the dependency table.

    Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
    3.
    发明授权
    Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system 有权

    公开(公告)号：US10042799B1

    公开(公告)日：2018-08-07

    申请号：US15603434

    申请日：2017-05-23

    Applicant: BiTMICRO LLC

    Inventor： Cyrill C. Ponce ,  Marizonne O. Fuentes ,  Gianico G. Noble

    IPC: G06F13/37 ,  G06F13/28

    CPC classification number: G06F13/37 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0683 ,  G06F13/28 ,  G06F13/287

    Abstract: In an embodiment of the invention, a method comprises: A method, comprising: issuing, by a Direct Memory Access (DMA) engine, an update request to a dependency table if the DMA engine has finished executing a first descriptor; and issuing, by the DMA engine, a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the subindex is in the dependency table. In another embodiment of the invention, an apparatus comprises: a Direct Memory Access (DMA) engine configured to issue an update request to a dependency table if the DMA engine has finished executing a first descriptor, and configured to issue a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the subindex is in the dependency table.

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