公开(公告)号：US20160110900A1

公开(公告)日：2016-04-21

申请号：US14518177

申请日：2014-10-20

Applicant: Mateen Moosa ,  Marin Petkov ,  Andrew Lindsay ,  Brian D. Young

Inventor： Mateen Moosa ,  Marin Petkov ,  Andrew Lindsay ,  Brian D. Young

IPC: G06T11/60

CPC classification number: G06T11/203

Abstract: The system and method for providing a composite image corresponding to a textual message. The composite image is generated by receiving a text message, parsing out styling information, using predetermined size and spacing for combinations of typographical characters in combinations with a graphics editing routine which allows for the recognition and translation of text into a series of images which can then be presented to a viewer as a composite image.

Abstract translation: 用于提供对应于文本消息的合成图像的系统和方法。 合成图像是通过接收文本消息，解析出样式信息，使用预定大小和间隔将印刷字符的组合与图形编辑程序组合来生成的，该图形编辑程序允许将文本识别和翻译成一系列图像， 作为合成图像呈现给观看者。

公开(公告)号：US20150276854A1

公开(公告)日：2015-10-01

申请号：US14227225

申请日：2014-03-27

Applicant: Stanley A. Cejka ,  Steven A. Atherton ,  William J. Downey ,  James C. Gobab ,  Brian D. Young

Inventor： Stanley A. Cejka ,  Steven A. Atherton ,  William J. Downey ,  James C. Gobab ,  Brian D. Young

IPC: G01R31/28 ,  H01L23/00 ,  H01L23/50 ,  H01L23/538

CPC classification number: G01R31/2818 ,  G01R31/2812 ,  G01R31/2882 ,  G01R31/2896 ,  H01L22/34 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/1319 ,  H01L2224/14179 ,  H01L2224/16227 ,  H01L2224/45014 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/852 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/30101 ,  H01L2924/351 ,  H05K1/141 ,  H05K3/3436 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0781 ,  H01L2924/00012

Abstract: A circuit device mounted on a substrate includes a detection circuit that monitors a characteristic of a return signal to determine an integrity of various interconnects of the device.

Abstract translation: 安装在基板上的电路装置包括检测电路，其检测返回信号的特性，以确定装置的各种互连的完整性。

公开(公告)号：US07598772B2

公开(公告)日：2009-10-06

申请号：US11773476

申请日：2007-07-05

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H03K19/094 ,  H03K19/0175 ,  H03B1/00

CPC classification number: H03K5/1534 ,  H03K19/00369 ,  H03K19/017509

Abstract: A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers configured to output signals based on time constants established by corresponding plural time-delay networks associated therewith. The signal driver further includes a slew rate selector coupled to the plural time-delay networks and configured to provide a common signal thereto to cause the plural time-delay networks to achieve target time constants, the target time constants causing the output signals to be generated such that the signal driver achieves the selectable aggregate slew rate.

Abstract translation: 具有可选择的总体压摆率的信号驱动器，驱动信号驱动器的方法和结合驱动器的信号驱动器或方法。 驱动器包括多个部分驱动器，配置为基于由相关联的多个时间延迟网络建立的时间常数来输出信号。 信号驱动器还包括耦合到多个时间延迟网络并被配置为提供公共信号的转换速率选择器，以使得多个延时网络实现目标时间常数，导致产生输出信号的目标时间常数 使得信号驱动器实现可选择的总体转换速率。

公开(公告)号：US5498905A

公开(公告)日：1996-03-12

申请号：US296392

申请日：1994-08-26

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H05K1/14 ,  H01L23/13 ,  H01L23/538 ,  H05K1/00 ,  H05K1/03 ,  H05K1/18 ,  H05K3/34 ,  H05K3/46 ,  H01L23/32

CPC classification number: H01L23/13 ,  H01L23/5384 ,  H05K1/183 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/15151 ,  H05K1/0298 ,  H05K1/0306 ,  H05K2201/10681 ,  H05K3/3421

Abstract: A unitized multilayer circuit structure that includes a plurality of planar dielectric insulating layers stacked in laminar fashion to form a substrate having sides formed by edges of the dielectric insulating layers and recessed regions formed in one or more one sides of the substrate for use in attaching the unitized multilayer circuit structure to a higher level assembly or for attaching electrical contact circuitry to the unitized multilayer circuit structure.

Abstract translation: 一种单元化多层电路结构，其包括以层叠方式堆叠的多个平面介电绝缘层，以形成基板，所述基板具有由形成在所述基板的一个或多个侧面中的所述介电绝缘层和凹陷区域的边缘形成的侧面， 将单元化多层电路结构连接到更高级组件或用于将电接触电路附接到单元化多层电路结构。

公开(公告)号：US4877839A

公开(公告)日：1989-10-31

申请号：US203848

申请日：1988-06-08

Applicant: John N. Conti-Ramsden ,  Richard L. Powell ,  Brian D. Young ,  Jeffrey Farrar ,  Debra K. Brown

Inventor： John N. Conti-Ramsden ,  Richard L. Powell ,  Brian D. Young ,  Jeffrey Farrar ,  Debra K. Brown

IPC: C08L27/12 ,  C08L33/00 ,  C08L33/06

CPC classification number: C08L27/12 ,  C08L33/06

Abstract: Composition, optionally curable, comprising a fluorocopolymer admixed with an acrylic polymer, where the fluoropolymer comprises units of a fluorolefine (e.g. TFE) and fluoroallylether (e.g. tetrafluororallylether).

公开(公告)号：US20080157843A1

公开(公告)日：2008-07-03

申请号：US11773476

申请日：2007-07-05

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H03H11/26

CPC classification number: H03K5/1534 ,  H03K19/00369 ,  H03K19/017509

Abstract: A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers configured to output signals based on time constants established by corresponding plural time-delay networks associated therewith. The signal driver further includes a slew rate selector coupled to the plural time-delay networks and configured to provide a common signal thereto to cause the plural time-delay networks to achieve target time constants, the target time constants causing the output signals to be generated such that the signal driver achieves the selectable aggregate slew rate.

Abstract translation: 具有可选择的总体压摆率的信号驱动器，驱动信号驱动器的方法和结合驱动器的信号驱动器或方法。 驱动器包括多个部分驱动器，配置为基于由相关联的多个时间延迟网络建立的时间常数来输出信号。 信号驱动器还包括耦合到多个时间延迟网络并被配置为提供公共信号的转换速率选择器，以使得多个延时网络实现目标时间常数，导致产生输出信号的目标时间常数 使得信号驱动器实现可选择的总体转换速率。

公开(公告)号：US5408053A

公开(公告)日：1995-04-18

申请号：US160015

申请日：1993-11-30

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H01P3/08 ,  H05K1/02 ,  H05K1/03 ,  H05K3/40 ,  H05K3/46 ,  H05K1/00

CPC classification number: H01P3/088 ,  H05K1/0219 ,  H05K1/0265 ,  H05K1/0306 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K3/4053 ,  H05K3/4611 ,  H05K3/4629

Abstract: A transmission line structure including a central signal conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers of a unitized multilayer circuit structure, a first ground conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers and laterally separated from one side of the central signal conductor stack, and a second ground conductor stack of elongated conductive strips separated from each other by contiguous dielectric layers and laterally separated from another side of the central signal conductor stack such that the central conductor stack is laterally between the first and second ground conductor stacks.

Abstract translation: 传输线结构，其包括由单位化多层电路结构的连续电介质层彼此分离的细长导电条的中心信号导体叠层，细长导电条的第一接地导体堆叠，其由连续的电介质层彼此分离并且横向分离 中心信号导体叠层的一侧和细长导电条的第二接地导体叠层，它们由连续的电介质层彼此分开，并与中心信号导体堆叠的另一侧横向分离，使得中心导体堆叠横向位于第一 和第二接地导体堆叠。

公开(公告)号：US4942203A

公开(公告)日：1990-07-17

申请号：US217226

申请日：1988-07-11

Applicant: John N. Conti-Ramsden ,  Robert A. Head ,  Richard L. Powell ,  Brian D. Young

Inventor： John N. Conti-Ramsden ,  Robert A. Head ,  Richard L. Powell ,  Brian D. Young

IPC: C08L33/06 ,  C08L33/04 ,  C08L51/08 ,  C08L71/02

CPC classification number: C08L33/04 ,  C08L71/02

Abstract: A polymer composition comprising (1) a polyether polyol which is a product obtained by the free radical addition of a fluoro-olefin of the general formula: ##STR1## wherein Y represents F or fluoroalkyl and Z represents Cl or F(CF.sub.2)m--wherein m is an integer from 0 to 10 or Y and Z together form a (CH.sub.2)p--chain wherein p represents an integer from 2 to 4, to a polytetramethylene gylcol having a molecular weight in the range 162 to 5000 and (2) at least one acrylic polymer. The composition is useful for coating compositions or for the fabrication of films.

公开(公告)号：US20140131866A1

公开(公告)日：2014-05-15

申请号：US13675008

申请日：2012-11-13

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/49822 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A semiconductor device includes a substrate configured with a plurality of conductive traces. The traces are configured to electrically couple to an integrated circuit (IC) die and at least one of the plurality of conductive traces includes first electrically conductive portions in a first electrically conductive layer of the substrate, second electrically conductive portions in a second electrically conductive layer of the substrate, and first electrically conductive connections between the first electrically conductive portions and the second electrically conductive portions. The first and second electrically conductive portions and the first electrically conductive connections form a continuous path along at least a portion of the at least one of the conductive traces. Time delay of conducting a signal along the at least one of the conductive traces is within a specified amount of time of time delay of conducting a signal along another one of the plurality of conductive traces.

Abstract translation: 半导体器件包括配置有多个导电迹线的衬底。 迹线被配置为电耦合到集成电路（IC）管芯，并且多个导电迹线中的至少一个导电迹线包括在衬底的第一导电层中的第一导电部分，第二导电层中的第二导电部分 以及第一导电部分和第二导电部分之间的第一导电连接。 第一和第二导电部分和第一导电连接件沿至少一个导电迹线的至少一部分形成连续路径。 沿着至少一个导电迹线传导信号的时间延迟在沿多个导电迹线中的另一个传导信号的指定时间延迟时间内。

公开(公告)号：US06346832B1

公开(公告)日：2002-02-12

申请号：US09575257

申请日：2000-05-22

Applicant: Brian D. Young

Inventor： Brian D. Young

IPC: H03B100

CPC classification number: H04L5/20

Abstract: A transmission circuit provides two outputs. The two outputs carry both signal information as a differential voltage and carry a signal as a common mode voltage. The differential voltage is sensed by a comparator. The common mode voltage is sensed by a single-ended amplifier. This transmission circuit is combined with another one so that the signal, which is carried as the common mode signal, is carried on the first pair of differential signals as well as a second pair of differential signals. Thus, one signal is carried as a differential signal on two lines, a third signal is carried as a differential signal on two additional lines, and the common mode signal is carried on all four lines. The first two lines provide the differential signal which is sensed by a comparator. The second pair of lines carries a differential signal which is sensed by another comparator. The first pair of lines is combined to provide a common mode signal. The second pair of lines is combined to provide a complementary common mode signal. The true and the complementary common mode signals are sensed by a comparator. Thus, four lines carry 3 differential signals which are all capable of high speed and may be synchronous or asynchronous.

Abstract translation: 传输电路提供两个输出。 两个输出将信号信号作为差分电压携带，并将信号作为共模电压传送。 差分电压由比较器检测。 共模电压由单端放大器检测。 该传输电路与另一个传输电路组合，使得作为共模信号承载的信号被承载在第一对差分信号以及第二对差分信号上。 因此，一个信号作为差分信号被携带在两条线上，第三信号作为差分信号被携带在两条附加线上，并且共模信号在所有四条线上传送。 前两行提供由比较器感测的差分信号。 第二对线路携带由另一比较器感测到的差分信号。 第一对线路被组合以提供共模信号。 第二对线对被组合以提供互补的共模信号。 真实和互补的共模信号由比较器检测。 因此，四条线路携带3个差分信号，这些差分信号都能够高速并且可能是同步或异步的。