INTEGRATED CIRCUIT PROBING APPARATUS HAVING A TEMPERATURE-ADJUSTING MECHANISM
    1.
    发明申请
    INTEGRATED CIRCUIT PROBING APPARATUS HAVING A TEMPERATURE-ADJUSTING MECHANISM 审中-公开
    具有温度调节机构的集成电路探测装置

    公开(公告)号:US20100134130A1

    公开(公告)日:2010-06-03

    申请号:US12697508

    申请日:2010-02-01

    CPC classification number: G01R31/2891 G01R1/07342 G01R1/44 G01R31/2874

    Abstract: A probing apparatus for integrated circuit devices comprises a probe card, a probe holder for holding the probe card, a test head and a temperature-adjusting mechanism. The probe card comprises at least one probe capable of forming an electrical connection with the integrated circuit device facing a first surface of the probe card, and the temperature-adjusting mechanism can be positioned on/above a second surface of the probe card. The temperature-adjusting mechanism can be positioned inside the probe card, inside the probe holder or on the probe holder. The test head comprises a plurality of pins configured to form electrical connections with connecting sites of the probe card and test and measurement units and apparatus. The temperature-adjusting mechanism can be positioned on or inside the test head. The temperature-adjusting mechanism comprises a flow line having at least one inlet and a plurality of outlets, and the outlets can be positioned on the second surface of the probe card.

    Abstract translation: 用于集成电路装置的探测装置包括探针卡,用于保持探针卡的探针支架,测试头和温度调节机构。 探针卡包括至少一个能够与集成电路装置形成与探针卡的第一表面电连接的探针,并且温度调节机构可位于探针卡的第二表面上/上。 温度调节机构可位于探针卡内,探头支架内或探头支架上。 测试头包括多个引脚,其被配置为与探针卡的连接部位和测试和测量单元和设备形成电连接。 温度调节机构可以位于测试头的内部或内部。 温度调节机构包括具有至少一个入口和多个出口的流动管线,并且出口可以定位在探针卡的第二表面上。

    INTEGRATED CIRCUIT PROBING APPARATUS HAVING A TEMPERATURE-ADJUSTING MECHANISM

    公开(公告)号:US20080150567A1

    公开(公告)日:2008-06-26

    申请号:US12046818

    申请日:2008-03-12

    CPC classification number: G01R31/2891 G01R1/07342 G01R1/44 G01R31/2874

    Abstract: A probing apparatus for integrated circuit devices comprises a probe card, a probe holder for holding the probe card, a test head and a temperature-adjusting mechanism. The probe card comprises at least one probe capable of forming an electrical connection with the integrated circuit device facing a first surface of the probe card, and the temperature-adjusting mechanism can be positioned on/above a second surface of the probe card. The temperature-adjusting mechanism can be positioned inside the probe card, inside the probe holder or on the probe holder. The test head comprises a plurality of pins configured to form electrical connections with connecting sites of the probe card and test and measurement units and apparatus. The temperature-adjusting mechanism can be positioned on or inside the test head. The temperature-adjusting mechanism comprises a flow line having at least one inlet and a plurality of outlets, and the outlets can be positioned on the second surface of the probe card.

    PROBE AND ELASTIC STRUCTURE THEREOF
    3.
    发明公开

    公开(公告)号:US20230314473A1

    公开(公告)日:2023-10-05

    申请号:US17889034

    申请日:2022-08-16

    Inventor: CHOON LEONG LOU

    CPC classification number: G01R1/06716 G01R1/0675

    Abstract: The present disclosure provides a probe and an elastic structure thereof. The probe includes: a first end portion, a second end portion and a plurality of elastic units. The elastic units are disposed between the first end portion and the second portion. Each elastic unit includes a first supporting element and a second supporting element, wherein the first supporting element and the second supporting element are at opposite sides of an axis, and the axis extends along a length of the probe.

    HIGH-PRECISION SEMICONDUCTOR DEVICE PROBING APPARATUS AND SYSTEM THEREOF
    4.
    发明申请
    HIGH-PRECISION SEMICONDUCTOR DEVICE PROBING APPARATUS AND SYSTEM THEREOF 有权
    高精度半导体器件探测器及其系统

    公开(公告)号:US20130249584A1

    公开(公告)日:2013-09-26

    申请号:US13425170

    申请日:2012-03-20

    CPC classification number: G01R1/07342 G01R1/06727 G01R1/07357 G01R31/2891

    Abstract: A high precision semiconductor probing system includes a probe head, a circuit board positioned above the probe head, and an optical microscope, wherein the probe head has a plurality of vertical probes and at least one cantilever probe having a vertical body positioned therein. The cantilever probe is disposed close to an edge of the probe head and extends laterally out from the probe head, in order to facilitate the visual alignment viewing from top of the probing apparatus. The optical microscope is positioned on top of the probing apparatus and is configured to have a line of sight directed to the tip of the cantilever probe.

    Abstract translation: 高精度半导体探测系统包括探针头,位于探针头上方的电路板和光学显微镜,其中探头具有多个垂直探针和至少一个垂直体定位在其中的悬臂探头。 悬臂探头靠近探头的边缘设置,并从探针头侧向伸出,以便于从探测装置的顶部观察视觉对准。 光学显微镜位于探测装置的顶部,并被配置成具有指向悬臂探针的尖端的视线。

    TESTING APPARATUS FOR PERFORMING AN AVALANCHE TEST AND METHOD THEREOF
    5.
    发明申请
    TESTING APPARATUS FOR PERFORMING AN AVALANCHE TEST AND METHOD THEREOF 审中-公开
    用于执行AVALANCHE测试的测试装置及其方法

    公开(公告)号:US20130229200A1

    公开(公告)日:2013-09-05

    申请号:US13412298

    申请日:2012-03-05

    CPC classification number: G01R31/2601 G01R31/2623

    Abstract: A testing apparatus for performing an avalanche test comprises a wafer chuck configured to retain a wafer having a plurality of transistors, an inductor with a first end connected to a drain terminal of the transistor, a power source configured to provide a current to a second end of the inductor through a switch, a meter connected to a source terminal of the transistor through the wafer chuck, and a driver configured to synchronously control the operation of the switch and the operation of the transistor.

    Abstract translation: 用于执行雪崩测试的测试装置包括配置成保持具有多个晶体管的晶片的晶片卡盘,具有连接到晶体管的漏极端子的第一端的电感器,被配置为向第二端提供电流的电源 的电感器,通过晶片卡盘连接到晶体管的源极端子的仪表以及被配置为同步地控制开关的操作和晶体管的操作的驱动器。

    TESTING APPARATUS FOR PERFORMING AVALANCHE TEST
    6.
    发明申请
    TESTING APPARATUS FOR PERFORMING AVALANCHE TEST 审中-公开
    用于执行越野车测试的测试装置

    公开(公告)号:US20130229199A1

    公开(公告)日:2013-09-05

    申请号:US13412135

    申请日:2012-03-05

    Inventor: CHOON LEONG LOU

    CPC classification number: G01R31/2601 G01R31/2623

    Abstract: A testing apparatus for performing an avalanche test includes a wafer chuck configured to retain a wafer having a plurality of transistors, wherein the wafer chuck includes an insulating body and a plurality of conductors embedded in the insulating body. In one embodiment of the present invention, the device holder includes a plurality of conductors having horizontal sides and longitudinal sides, a plurality of insulating horizontal lines positioned at the horizontal sides, and a plurality of insulating longitudinal lines positioned at the longitudinal sides and intersecting the horizontal lines.

    Abstract translation: 用于执行雪崩测试的测试装置包括配置为保持具有多个晶体管的晶片的晶片卡盘,其中晶片卡盘包括绝缘体和嵌入绝缘体中的多个导体。 在本发明的一个实施例中,装置保持器包括多个具有水平侧面和纵向侧面的导体,多个位于水平侧的绝缘水平线,以及多个绝缘纵向线,位于纵向侧面并与 水平线。

    HIGH FREQUENCY CIRCUIT BOARD
    7.
    发明申请
    HIGH FREQUENCY CIRCUIT BOARD 审中-公开
    高频电路板

    公开(公告)号:US20130048344A1

    公开(公告)日:2013-02-28

    申请号:US13220825

    申请日:2011-08-30

    Inventor: CHOON LEONG LOU

    Abstract: In one embodiment of the present invention, a high frequency circuit board includes a laminate having a top surface with a groove; a semi-rigid cable positioned in the groove of the laminate; and a passivation layer filling the groove; wherein the semi-rigid cable is configured to transmit a high frequency signal, and the semi-rigid cable comprises a central conductor, an outer conductor, and an insulating layer between the central conductor and the outer conductor.

    Abstract translation: 在本发明的一个实施例中,高频电路板包括具有凹槽的顶表面的叠层; 位于层压板的槽中的半刚性电缆; 以及填充所述凹槽的钝化层; 其中所述半刚性电缆被配置为传输高频信号,并且所述半刚性电缆包括在所述中心导体和所述外导体之间的中心导体,外导体和绝缘层。

    INTEGRATED CIRCUIT PROBING APPARATUS HAVING A TEMPERATURE-ADJUSTING MECHANISM
    8.
    发明申请
    INTEGRATED CIRCUIT PROBING APPARATUS HAVING A TEMPERATURE-ADJUSTING MECHANISM 审中-公开
    具有温度调节机构的集成电路探测装置

    公开(公告)号:US20090015283A1

    公开(公告)日:2009-01-15

    申请号:US12239060

    申请日:2008-09-26

    CPC classification number: G01R31/2891 G01R1/07342 G01R1/44 G01R31/2874

    Abstract: A probing apparatus for integrated circuit devices comprises a probe card, a probe holder for holding the probe card, a test head and a temperature-adjusting mechanism. The probe card comprises at least one probe capable of forming an electrical connection with the integrated circuit device facing a first surface of the probe card, and the temperature-adjusting mechanism can be positioned on/above a second surface of the probe card. The temperature-adjusting mechanism can be positioned inside the probe card, inside the probe holder or on the probe holder. The test head comprises a plurality of pins configured to form electrical connections with connecting sites of the probe card and test and measurement units and apparatus. The temperature-adjusting mechanism can be positioned on or inside the test head. The temperature-adjusting mechanism comprises a flow line having at least one inlet and a plurality of outlets, and the outlets can be positioned on the second surface of the probe card.

    Abstract translation: 用于集成电路装置的探测装置包括探针卡,用于保持探针卡的探针支架,测试头和温度调节机构。 探针卡包括至少一个能够与集成电路装置形成与探针卡的第一表面电连接的探针,并且温度调节机构可位于探针卡的第二表面上/上。 温度调节机构可位于探针卡内,探头支架内或探头支架上。 测试头包括多个引脚,其被配置为与探针卡的连接部位和测试和测量单元和设备形成电连接。 温度调节机构可以位于测试头的内部或内部。 温度调节机构包括具有至少一个入口和多个出口的流动管线,并且出口可以定位在探针卡的第二表面上。

    PROBE STRUCTURE
    9.
    发明公开
    PROBE STRUCTURE 审中-公开

    公开(公告)号:US20230314475A1

    公开(公告)日:2023-10-05

    申请号:US17889143

    申请日:2022-08-16

    Inventor: CHOON LEONG LOU

    CPC classification number: G01R1/06738 G01R31/2886

    Abstract: The present disclosure provides a probe structure. The probe structure includes a plurality of bodies and a plurality of protrusions. Each body includes an end portion. Each end portion has a surface. The plurality of protrusions are formed on the surfaces and extend toward a same direction. At least one protrusion is formed on each surface.

    SWITCHING MATRIX AND TESTING SYSTEM FOR SEMICONDUCTOR CHARACTERISTIC MEASUREMENT USING THE SAME
    10.
    发明申请
    SWITCHING MATRIX AND TESTING SYSTEM FOR SEMICONDUCTOR CHARACTERISTIC MEASUREMENT USING THE SAME 有权
    用于半导体特性测量的切换矩阵和测试系统

    公开(公告)号:US20130082731A1

    公开(公告)日:2013-04-04

    申请号:US13425987

    申请日:2012-03-21

    CPC classification number: G01R31/2844

    Abstract: A switching matrix includes a plurality of input ports, a plurality of output ports, a plurality of switching devices configured to open and close, an electrical connection between the input ports and the output ports, and an electrical sensor configured to generate a signal by measuring a predetermined electrical property of the electrical connection, the open and close of switching devices is pre-determined by status read from the electrical sensor.

    Abstract translation: 开关矩阵包括多个输入端口,多个输出端口,多个开关装置,其被配置为打开和关闭输入端口和输出端口之间的电连接;以及电传感器,被配置为通过测量产生信号 通过从电传感器读取的状态来预先确定电气连接的预定电气特性,开关装置的打开和关闭。

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