公开(公告)号：US20220367682A1

公开(公告)日：2022-11-17

申请号：US17765295

申请日：2020-08-18

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Nailong HE ,  Sen ZHANG

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/04 ,  H01L21/762

Abstract: A semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a semiconductor substrate. A first drift region is formed in the semiconductor substrate. A gate structure is formed on the semiconductor substrate A part of the gate structure covers a part of the first drift region. A first trench is formed in the first drift region, and a drain region is formed in the semiconductor substrate at the bottom of the first trench.

公开(公告)号：US20210175347A1

公开(公告)日：2021-06-10

申请号：US16770362

申请日：2018-12-05

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Nailong HE ,  Sen ZHANG ,  Guangsheng ZHANG ,  Yun LAN

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L21/762

Abstract: A manufacturing method of an LDMOS device comprises: obtaining a wafer formed with a doped region having a first conductivity type, wherein a top buried layer is formed inside the doped region having the first conductivity type, and a field oxide insulation layer structure is formed on the top buried layer; disposing a trench on the doped region having the first conductivity type, wherein the trench extends to the top buried layer and the field oxide insulation layer structure such that a portion of the top buried layer is removed; injecting an ion of a second conductivity type to form a well region below the trench; and forming a doped source region in the well region. The first conductivity type and the second conductivity type are opposite conductivity types.

公开(公告)号：US20250056834A1

公开(公告)日：2025-02-13

申请号：US18722930

申请日：2022-11-30

Applicant: SOUTHEAST UNIVERSITY ,  CSMC TECHNOLOGIES FAB2 CO LTD.

Inventor： Long ZHANG ,  Nailong HE ,  Yongjiu CUI ,  Sen ZHANG ,  Xiaona WANG ,  Feng LIN ,  Jie MA ,  Siyang LIU ,  Weifeng SUN

IPC: H01L29/78 ,  H01L21/266 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66

Abstract: A manufacturing method for a P-type laterally diffused metal oxide semiconductor device includes: forming a N-type buried layer in a substrate, forming a P-type region located on the N-type buried layer, and forming a mask layer located on the P-type region; patterning the mask layer to form at least two injection windows; performing N-type ion implantation by the at least two injection windows; forming an oxide layer; removing the mask layer; performing P-type ion implantation on the P-type region to form a P-type doped region; diffusing the P-type doped region to form a drift region and two P-type well regions, diffusing the high-voltage N-well doped region to form a high-voltage N-type well region, and diffusing the low-voltage N-well doped region to form a low-voltage N-type well region; and forming a source doped region, a drain doped region, and a gate.

公开(公告)号：US20240072178A1

公开(公告)日：2024-02-29

申请号：US18262083

申请日：2022-03-03

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Yan GU ,  Hua SONG ,  Nailong HE ,  Sen ZHANG

IPC: H01L29/872 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/872 ,  H01L29/404 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7394 ,  H01L29/7835

Abstract: A diode and a manufacturing method therefor, and a semiconductor device. The diode includes: a substrate; an insulating buried layer provided on the substrate; a semiconductor layer provided on the insulating buried layer; anode; and a cathode, comprising: a trench-type contact, a trench being filled with a contact material, the trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, the first surface being a surface distant from the insulating buried layer, and the second surface being a surface facing the insulating buried layer; a cathode doped region surrounding the trench-type contact around and at the bottom of the trench-type contact, and also disposed on the first surface around the trench-type contact; and a negative electrode located on the cathode doped region and electrically connected to the cathode doped region.

公开(公告)号：US20230146299A1

公开(公告)日：2023-05-11

申请号：US17912760

申请日：2021-07-02

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Jingchuan ZHAO ,  Nailong HE ,  Sen ZHANG ,  Zhili ZHANG ,  Hao WANG

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L21/265 ,  H01L21/266 ,  H01L29/66

CPC classification number: H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/7816 ,  H01L21/26513 ,  H01L21/266 ,  H01L29/66681

Abstract: A laterally diffused metal-oxide-semiconductor (LDMOS) device and a method for fabricating the LDMOS device are disclosed. The device includes: a substrate (101) having a second conductivity type; a drift region (102) that has a first conductivity type and is disposed on the substrate (101), wherein the first conductivity type is opposite to the second conductivity type; a plurality of layers of doped structures disposed in the drift region (102), each layer of the doped structure comprising at least one doped bar (105) extending in a lengthwise direction of a conductive channel; and a plurality of doped polysilicon pillars (106) disposed in the drift region (102) so as to extend downward through the doped bar (105) of at least one of the layer of doped structures, wherein ions doped in the doped polysilicon pillars (106) and ions doped in the doped bar have opposite conductivity types.

公开(公告)号：US20220302305A1

公开(公告)日：2022-09-22

申请号：US17639359

申请日：2020-05-26

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Nailong HE

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/266 ,  H01L21/265

Abstract: The present disclosure provides a lateral double-diffused metal oxide semiconductor device and a manufacturing method thereof, and an electronic apparatus. The method includes: providing a semiconductor substrate, and forming a drift region and a body region in the semiconductor substrate; forming a drain region in the drift region, forming a source region in the body region, and forming, on the body region, a gate structure extending to the drift region; implanting ions of a first type, so as to form, at a bottom of the drift region, first ion implantation regions extending along a direction from the gate structure to the drain region; forming, above the first ion implantation regions, a plurality of mutually spaced deep trench structures and fin structures between adjacent ones of the deep trench structures; and implanting ions of a second type in the deep trench structures to form second ion implantation regions.

公开(公告)号：US20210036150A1

公开(公告)日：2021-02-04

申请号：US16645139

申请日：2018-09-01

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Nailong HE ,  Sen ZHANG ,  Xuchao LI

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L29/06

Abstract: A lateral double-diffused metal oxide semiconductor component and a manufacturing method therefor. The lateral double-diffused metal oxide semiconductor component comprises: a semiconductor substrate, the semiconductor substrate being provided thereon with a drift area; the drift area being provided therein with a trap area and a drain area, the trap area being provided therein with an active area and a channel; the drift area being provided therein with a deep trench isolation structure arranged between the trap area and the drain area, and the deep trench isolation structure being provided at the bottom thereof with alternately arranged first p-type injection areas and first n-type injection areas.