公开(公告)号：US06610411B2

公开(公告)日：2003-08-26

申请号：US09965043

申请日：2001-09-27

Applicant: Bassel H. Daoud ,  Christopher R. Gayle ,  Ivan Pawlenko ,  Michael J. Wheeler

Inventor： Bassel H. Daoud ,  Christopher R. Gayle ,  Ivan Pawlenko ,  Michael J. Wheeler

IPC: B32B904

CPC classification number: H01B7/28 ,  B32B7/06 ,  H01R13/5216 ,  H01R24/40 ,  Y10T428/31663

Abstract: A protective tape used to protect an electrical connection from the effects of ultraviolet radiation. The protective tape comprises a silicone gel that contains a UV inhibitor such as zinc oxide. The protective tape is used to wrap a connection, such as a coaxial connection, in order to provide a long lasting, secure environment for the connection and to shield against the effects of UV radiation that can otherwise cause a deterioration of tape. As one embodiment, the silicone gel is a two layer gel with each layer having a different hardness. The tape is formed by casting the silicone gel on a suitable backing and that backing is removed from the tape at the time the tape is used to wrap around the electrical connection.

Abstract translation: 用于保护电气连接免受紫外线辐射影响的保护胶带。 保护胶带包含含有UV抑制剂如氧化锌的硅凝胶。 保护带用于包裹诸如同轴连接的连接，以便为连接提供持久和安全的环境并且防止否则会导致带的劣化的紫外线辐射的影响。 作为一个实施方案，硅凝胶是双层凝胶，每层具有不同的硬度。 胶带通过将硅凝胶浇铸在合适的背衬上而形成，并且当胶带用于缠绕电连接时，将背衬从带上移除。

公开(公告)号：US5801601A

公开(公告)日：1998-09-01

申请号：US789749

申请日：1997-01-27

Applicant: Christopher R. Gayle

Inventor： Christopher R. Gayle

IPC: H01P7/00 ,  H05K1/02 ,  H05K3/22 ,  H01P1/18

CPC classification number: H05K1/0248 ,  H01P7/00 ,  H05K2201/0715 ,  H05K2201/09263 ,  H05K2201/09336 ,  H05K2201/10174 ,  H05K2201/10363 ,  H05K3/222

Abstract: A printed circuit board with a microstrip radio frequency delay line deposited thereon. In addition, a plurality of delay line segments are deposited on the board in close proximity to one end of the delay line. To achieve an overall desired delay length, one of the delay line segments is selected and serially inserted in circuit with the delay line by populating a surface mount circuit element between terminals at the ends of the delay line and the selected delay line segment.

Abstract translation: 具有沉积在其上的微带射频延迟线的印刷电路板。 此外，多个延迟线段沉积在板上，紧邻延迟线的一端。 为了实现总体期望的延迟长度，通过在延迟线的端部和所选择的延迟线段的端子之间填充表面安装电路元件，选择一个延迟线段并且与延迟线串联插入到电路中。

公开(公告)号：US06344975B1

公开(公告)日：2002-02-05

申请号：US09385701

申请日：1999-08-30

Applicant: Christopher R. Gayle

Inventor： Christopher R. Gayle

IPC: H01R2368

CPC classification number: H01R4/14 ,  H01R12/737 ,  H01R12/75 ,  H01R12/79 ,  H01R13/514 ,  H05K1/14 ,  H05K3/222

Abstract: The process of prototyping circuits such as a backplane or a circuit board has been modularized for achieving marked reductions in costs, time, and construction errors. Rather than repeating the recurring tasks, such as making bus connections between different circuit boards, of the prototyping process, the present invention implements a plurality of modules which can be separably coupled into an assembly having a planar arrangement for prototyping circuits, where each module specializes in a particular task. In the preferred embodiment, the plurality of modules includes a data bus module, a switchable data bus module, a power bus module, and a wire-wrap module. Each one of the plurality of modules includes a coupling face configured for coupling to one or more circuit boards. Since the assembly is constructed by simply coupling one or more modules to one another, the present invention facilitates rapid and cost-effective prototyping of a variety of backplanes as well as facilitates reuse of the assembly in multiple prototyping processes by simply separating the one or more modules from one another. Moreover, the bus modules are internally configured to couple one or more circuit boards together, thus substantially lowering the need for wire-wrapping. Hence, the construction errors associated with wire-wrapping are substantially reduced, leading to quality improvements.

Abstract translation: 诸如背板或电路板的原型开发电路的过程已被模块化，以实现成本，时间和结构误差的显着降低。 本发明不是重复重复的任务，例如在不同的电路板之间进行总线连接，而是在原型制作过程中实施多个模块，其可以可分离地耦合到具有用于原型开发电路的平面布置的组件中，其中每个模块专门化 在一个特定的任务。 在优选实施例中，多个模块包括数据总线模块，可切换数据总线模块，电源总线模块和电线包装模块。 多个模块中的每一个包括被配置为耦合到一个或多个电路板的耦合面。 由于组装通过简单地将一个或多个模块彼此耦合而构成，本发明有助于快速且具有成本效益的各种背板的原型设计，并且通过简单地分离一个或多个元件来促进组装在多个原型制作过程中的再利用 模块彼此。 此外，总线模块在内部被配置为将一个或多个电路板耦合在一起，从而大大降低了对电线包裹的需要。 因此，与丝缠绕有关的构造误差大大降低，导致质量提高。