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公开(公告)号：US10510653B2
公开(公告)日：2019-12-17
申请号：US16110055
申请日：2018-08-23
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: H01L23/498 , H01L21/56 , H01L21/48 , H01L23/31 , H01L23/00
Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.
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公开(公告)号：US20180263118A1
公开(公告)日：2018-09-13
申请号：US15978268
申请日：2018-05-14
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
CPC classification number: H05K3/0041 , G06F3/041 , G06F2203/04102 , G06F2203/04103 , G06K9/00013 , H01L29/1606 , H05K1/0278 , H05K1/0306 , H05K1/0326 , H05K1/0346 , H05K1/09 , H05K1/144 , H05K3/0064 , H05K3/025 , H05K3/027 , H05K3/381 , H05K2201/0141 , H05K2201/0145 , H05K2201/0154 , H05K2201/0323 , H05K2201/042 , H05K2203/0152 , H05K2203/0376 , H05K2203/095 , H05K2203/1545
Abstract: A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left there between.
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3.发明申请公开(公告)号：US20180102312A1
公开(公告)日：2018-04-12
申请号：US15286849
申请日：2016-10-06
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L21/48 , H01L21/56
CPC classification number: H01L23/49838 , H01L21/4853 , H01L21/563 , H01L23/3185 , H01L23/4985 , H01L23/49894 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/81 , H01L2224/1134 , H01L2224/1146 , H01L2224/13144 , H01L2224/16168 , H01L2224/81203 , H01L2224/8182
Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.
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公开(公告)号：US20170290167A1
公开(公告)日：2017-10-05
申请号：US15090703
申请日：2016-04-05
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
CPC classification number: H05K3/0041 , G06F3/041 , H05K1/0278 , H05K1/0306 , H05K1/0326 , H05K1/0346 , H05K1/09 , H05K1/144 , H05K3/0064 , H05K3/025 , H05K3/027 , H05K3/381 , H05K2201/0141 , H05K2201/0145 , H05K2201/0154 , H05K2201/0323 , H05K2201/042 , H05K2203/0152 , H05K2203/0376 , H05K2203/095 , H05K2203/1545
Abstract: A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left therebetween.
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公开(公告)号：US20160178372A1
公开(公告)日：2016-06-23
申请号：US14580297
申请日：2014-12-23
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: G01C19/00
CPC classification number: B81B7/007 , B81B2201/0242 , B81B2207/097 , B81C1/00301 , G01C19/00 , G01C19/5783 , H01L2224/48145 , H01L2924/15311 , H01L2924/16152 , H01L2924/16195 , H01L2924/181 , H01L2924/00012
Abstract: An integrated circuit packaging structure comprises at least one Micro Electrical Mechanical Systems (MEMS) gyroscope die mounted directly on a multi-layer flexible substrate having at least one metal layer and wire-bonded to the flexible substrate and a lid or die coating protecting the MEMS die and wire bonds.
Abstract translation: 集成电路封装结构包括至少一个微机电系统（MEMS）陀螺仪模具，其直接安装在具有至少一个金属层并且引线键合到柔性基板的多层柔性基板上，以及保护MEMS的盖或模具涂层 模具和线材。
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Patent Agency Ranking
公开(公告)号：US20210315108A1
公开(公告)日：2021-10-07
申请号：US17352562
申请日：2021-06-21
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung , Jason Rotanson
Abstract: An integrated electro-optical circuit board comprises a first flexible substrate having a top side and a bottom side, at least one first optical circuit on the bottom side of the first flexible substrate connected to the top surface through a filled via, at least one first metal trace on the top side of the first flexible substrate, an optical adhesive layer connecting the bottom side of the first flexible substrate to a top side of a second flexible substrate, and at least one second metal trace on a bottom side of the second flexible substrate connected by a filled via through the second flexible substrate, the optical adhesive layer, and the first flexible substrate to the at least one first metal trace.
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公开(公告)号：US20210159203A1
公开(公告)日：2021-05-27
申请号：US17164217
申请日：2021-02-01
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: H01L23/00 , H01L23/498
Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.
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公开(公告)号：US10923449B2
公开(公告)日：2021-02-16
申请号：US16157494
申请日：2018-10-11
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: H01L23/00 , H01L23/498
Abstract: A method to produce a semiconductor package or system-on-flex package comprising bonding structures for connecting IC/chips to fine pitch circuitry using a solid state diffusion bonding is disclosed. A plurality of traces is formed on a substrate, each respective trace comprising five different conductive materials having different melting points and plastic deformation properties, which are optimized for both diffusion bonding of chips and soldering of passives components.
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公开(公告)号：US10468342B2
公开(公告)日：2019-11-05
申请号：US15887346
申请日：2018-02-02
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung
IPC: H01L23/498 , H01L21/48 , H01L23/538 , C23C18/16 , C25D3/38 , C25D5/02 , H01L23/00
Abstract: A method to produce a substrate suitable for diffusion bonding is described. A flexible dielectric substrate is provided. An alkaline modification is applied to the dielectric substrate to form a polyamic acid (PAA) anchoring layer on a surface of the dielectric substrate. A Ni—P seed layer is electrolessly plated on the PAA layer. Copper traces are plated within a photoresist pattern on the Ni—P seed layer. A surface finishing layer is electrolytically plated on the copper traces. The photoresist pattern and Ni—P seed layer not covered by the copper traces are removed to complete the substrate suitable for diffusion bonding.
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公开(公告)号：US20240178124A1
公开(公告)日：2024-05-30
申请号：US18071819
申请日：2022-11-30
Applicant: Compass Technology Company Limited
Inventor： Kelvin Po Leung Pun , Chee Wah Cheung , Jason Rotanson
IPC: H01L23/498 , H01L21/56 , H01L23/00 , H01L23/31
CPC classification number: H01L23/4985 , H01L21/56 , H01L23/3121 , H01L24/32 , H01L24/83 , H01L24/08 , H01L2224/08225 , H01L2224/32225 , H01L2224/838
Abstract: A flexible substrate embedded die package is described comprising a multi-layer flexible substrate comprising a dielectric substrate, a top metal layer and a bottom metal layer connected with micro-via interconnection through said dielectric substrate, a semiconductor die attached by an adhesive to the flexible substrate and a dielectric bonding film surrounding the semiconductor die and sealing the semiconductor die to the flexible substrate.
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