公开(公告)号：US20160291950A1

公开(公告)日：2016-10-06

申请号：US15083502

申请日：2016-03-29

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Yoshihiro YATOU ,  Noriyuki SUZUKI ,  Kenichi MINEDA ,  Hironori KASAHARA ,  Keiji KIMURA ,  Hiroki MIKAMI ,  Dan UMEDA

IPC: G06F9/45 ,  G06F9/52

CPC classification number: G06F8/458 ,  G06F8/433 ,  G06F8/454 ,  G06F8/456 ,  G06F9/52

Abstract: A parallelization compiling method for generating a segmented program from a sequential program, in which multiple macro tasks are included and at least two of the macro tasks have a data dependency relationship with one another, includes determining an existence of invalidation information for invalidating at least a part of the data dependency relationship between the at least two of the plurality of macro tasks before compiling the sequential program into the segmented program, and generating the segmented program by compiling the sequential program into the segmented program with reference to a determination result of the existence of the invalidation information. When the invalidation information is determined to exist, the at least a part of the data dependency relationship is invalidated before the compiling of the sequential program into the segmented program.

Abstract translation: 一种用于从顺序程序生成分段程序的并行化编译方法，其中包括多个宏任务，并且所述宏任务中的至少两个具有彼此之间的数据依赖关系，包括确定无效信息的存在以使至少一个 参考所述存在的确定结果，将所述多个宏任务中的至少两个之间的数据依赖关系的一部分编译为所述分段程序，并且通过将所述顺序程序编译为所述分段程序来生成所述分段程序 的无效信息。 当确定存在无效信息时，在将顺序程序编译到分段程序之前，数据依赖关系的至少一部分被无效。

公开(公告)号：US20160291948A1

公开(公告)日：2016-10-06

申请号：US15083526

申请日：2016-03-29

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Kazushi NOBUTA ,  Noriyuki SUZUKI ,  Hironori KASAHARA ,  Keiji KIMURA ,  Hiroki MIKAMI ,  Dan UMEDA

IPC: G06F9/45

CPC classification number: G06F8/451

Abstract: A parallelization compiling method for generating a segmented program from a sequential program includes assigning macro tasks included in the sequential program to cores included in the multi-core processor in order to generate the segmented program, adding a new macro task to the sequential program or deleting one of the macro tasks from the sequential program, and compiling the sequential program into the segmented program in response to the adding of the new macro task under a condition that the macro tasks assigned to the cores do not migrate among the cores or compiling the sequential program into the segmented program in response to the deleting of the one of the macro tasks under a condition that remains of the macro tasks assigned to the cores do not migrate among the cores.

Abstract translation: 用于从顺序程序生成分段程序的并行化编译方法包括将包括在顺序程序中的宏任务分配给包含在多核处理器中的核心，以生成分段程序，将新的宏任务添加到顺序程序或删除 其中一个来自顺序程序的宏任务，以及响应于在分配给核的宏任务不在核心之间迁移或编译顺序的条件下添加新的宏任务，将顺序程序编译到分段程序中 程序进入分段程序，以响应删除宏任务之一，在分配给核心的宏任务的剩余部分不会在内核之间迁移的情况下。

公开(公告)号：US20160291949A1

公开(公告)日：2016-10-06

申请号：US15083592

申请日：2016-03-29

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Kenichi MINEDA ,  Noriyuki SUZUKI ,  Hironori KASAHARA ,  Keiji KIMURA ,  Hiroki MIKAMI ,  Dan UMEDA

IPC: G06F9/45

CPC classification number: G06F8/451 ,  G06F8/456

Abstract: A parallelization compiling method includes analyzing a sequential program prepared for a single-core processor; dividing the sequential program into a plurality of processes based on an analysis result; and generating a parallelized program, which is subjected to a parallelized execution by a multi-core processor, from the plurality of processes. The generating of the parallelized program includes compiling the plurality of processes under an execution order restriction defined based on a predetermined parameter.

Abstract translation: 并行编译方法包括分析为单核处理器准备的顺序程序; 基于分析结果将顺序程序划分为多个进程; 以及从多个处理生成由多核处理器进行并行执行的并行程序。 并行程序的生成包括在基于预定参数定义的执行顺序限制下编译多个进程。

公开(公告)号：US20140372995A1

公开(公告)日：2014-12-18

申请号：US14302886

申请日：2014-06-12

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Hiroshi MORI ,  Mitsuhiro TANI ,  Hironori KASAHARA ,  Keiji KIMURA ,  Dan UMEDA ,  Akihiro HAYASHI ,  Hiroki MIKAMI ,  Yohei KANEHAGI

IPC: G06F9/45

CPC classification number: G06F8/45 ,  G06F8/452 ,  G06F8/456

Abstract: A parallelizing compile method includes, dividing a sequential program for an embedded system into multiple macro tasks, specifying (i) a starting end task and (ii) a termination end task, fusing (i) the starting end task, (ii) the termination end task, and (iii) a group of the multiple macro tasks, extracting a group of multiple new macro tasks from the multiple new macro tasks fused in the fusing based on a data dependency, performing a static scheduling assigning the multiple new macro tasks to the multiple processor units, so that the group of the multiple new macro tasks is parallelly executable by the multiple processor units, and generating a parallelizing program. In addition, a parallelizing compiler, a parallelizing compile apparatus and an onboard apparatus are provided.

Abstract translation: 并行化编译方法包括：将嵌入式系统的顺序程序划分为多个宏任务，指定（i）起始端任务和（ii）终止任务，融合（i）起始端任务，（ii）终止 结束任务，以及（iii）一组多个宏任务，从基于数据依赖关系的融合融合的多个新的宏任务提取一组多个新的宏任务，执行将多个新的宏任务分配给静态调度 多个处理器单元，使得多个新的宏任务的组可由多个处理器单元并行地执行，并且生成并行化程序。 此外，还提供并行编译器，并行化编译装置和车载装置。