公开(公告)号：US20160291949A1

公开(公告)日：2016-10-06

申请号：US15083592

申请日：2016-03-29

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Kenichi MINEDA ,  Noriyuki SUZUKI ,  Hironori KASAHARA ,  Keiji KIMURA ,  Hiroki MIKAMI ,  Dan UMEDA

IPC: G06F9/45

CPC classification number: G06F8/451 ,  G06F8/456

Abstract: A parallelization compiling method includes analyzing a sequential program prepared for a single-core processor; dividing the sequential program into a plurality of processes based on an analysis result; and generating a parallelized program, which is subjected to a parallelized execution by a multi-core processor, from the plurality of processes. The generating of the parallelized program includes compiling the plurality of processes under an execution order restriction defined based on a predetermined parameter.

Abstract translation: 并行编译方法包括分析为单核处理器准备的顺序程序; 基于分析结果将顺序程序划分为多个进程; 以及从多个处理生成由多核处理器进行并行执行的并行程序。 并行程序的生成包括在基于预定参数定义的执行顺序限制下编译多个进程。

公开(公告)号：US20160291950A1

公开(公告)日：2016-10-06

申请号：US15083502

申请日：2016-03-29

Applicant: DENSO CORPORATION ,  WASEDA UNIVERSITY

Inventor： Yoshihiro YATOU ,  Noriyuki SUZUKI ,  Kenichi MINEDA ,  Hironori KASAHARA ,  Keiji KIMURA ,  Hiroki MIKAMI ,  Dan UMEDA

IPC: G06F9/45 ,  G06F9/52

CPC classification number: G06F8/458 ,  G06F8/433 ,  G06F8/454 ,  G06F8/456 ,  G06F9/52

Abstract: A parallelization compiling method for generating a segmented program from a sequential program, in which multiple macro tasks are included and at least two of the macro tasks have a data dependency relationship with one another, includes determining an existence of invalidation information for invalidating at least a part of the data dependency relationship between the at least two of the plurality of macro tasks before compiling the sequential program into the segmented program, and generating the segmented program by compiling the sequential program into the segmented program with reference to a determination result of the existence of the invalidation information. When the invalidation information is determined to exist, the at least a part of the data dependency relationship is invalidated before the compiling of the sequential program into the segmented program.

Abstract translation: 一种用于从顺序程序生成分段程序的并行化编译方法，其中包括多个宏任务，并且所述宏任务中的至少两个具有彼此之间的数据依赖关系，包括确定无效信息的存在以使至少一个 参考所述存在的确定结果，将所述多个宏任务中的至少两个之间的数据依赖关系的一部分编译为所述分段程序，并且通过将所述顺序程序编译为所述分段程序来生成所述分段程序 的无效信息。 当确定存在无效信息时，在将顺序程序编译到分段程序之前，数据依赖关系的至少一部分被无效。

公开(公告)号：US20170357511A1

公开(公告)日：2017-12-14

申请号：US15614771

申请日：2017-06-06

Applicant: DENSO CORPORATION

Inventor： Kenichi MINEDA

IPC: G06F9/38 ,  G06F9/46

CPC classification number: G06F9/38 ,  G06F8/433 ,  G06F8/456 ,  G06F9/3838 ,  G06F9/3851 ,  G06F9/46

Abstract: A computer obtains invalidation information that shows ignorable data dependency relationships from among a plurality of data dependency relationships, and extracts a synchronous-dependent relationship from among the ignorable data dependency relationships that are shown as a write-write to the same data by the invalidation information. Then, the computer generates a parallel program for maximizing the number of parallelized macro tasks by ignoring other data dependency relationships other than the extracted synchronous-dependent relationship while preventing simultaneous write to the same data by two macro tasks having the synchronous-dependent relationship.

公开(公告)号：US20170109216A1

公开(公告)日：2017-04-20

申请号：US15279600

申请日：2016-09-29

Applicant: DENSO CORPORATION

Inventor： Kenichi MINEDA

IPC: G06F9/52 ,  G06F9/48

CPC classification number: G06F9/52 ,  G06F8/451 ,  G06F9/4881

Abstract: A parallelization method for generating a parallel program for a multicore microcomputer from multiple processes in a single program for a single-core microcomputer is provided. In the single program, there are multiple types of the processes and a combination of the types of processes to be executed varies according to condition. The parallelization method includes extracting processing patterns respectively representing the combinations of types in the conditions from the single program and allocating the processes to the cores for each of the extracted processing patterns to generate the parallel program.

公开(公告)号：US20170357491A1

公开(公告)日：2017-12-14

申请号：US15618320

申请日：2017-06-09

Applicant: DENSO CORPORATION

Inventor： Kenichi MINEDA ,  Takayuki NAGAI ,  Yu NAKAGAWA

IPC: G06F9/45 ,  G06F9/48

CPC classification number: G06F8/45 ,  G06F9/4881

Abstract: A computer is configured to generate a parallel program for a multi-core microcomputer from a single program for a single-core microcomputer, based on a dependency analysis of a bundle of unit processes in the single program. The computer obtains dependency information that enables dependency determination of dependency un-analyzable unit processes. Further, the computer performs a dependency analysis of dependency analyzable unit processes. Then, the computer assigns the dependency un-analyzable unit processes and the dependency analyzable unit processes respectively to multiple cores of the multi-core microcomputer, while fulfilling dependency among those processes, based on the obtained dependency information of the dependency un-analyzable unit processes and an analysis result of the dependency analyzable unit processes.

公开(公告)号：US20170364341A1

公开(公告)日：2017-12-21

申请号：US15617038

申请日：2017-06-08

Applicant: DENSO CORPORATION

Inventor： Kenichi MINEDA

IPC: G06F9/45 ,  G06F9/50 ,  G06F9/48

Abstract: A computer generates a parallel program, based on an analysis of a single program that includes a plurality of tasks written for a single-core microcomputer, by parallelizing parallelizable tasks for a multi-core processor having multiple cores. The computer includes a macro task (MT) group extractor that analyzes, or finds, a commonly-accessed resource commonly accessed by the plurality of tasks, and extracts a plurality of MTs showing access to such commonly-accessed resource. Then, the computer uses an allocation restriction determiner to allocate the extracted plural MTs to the same core in the multi-core processor. By devising a parallelization method described above, an overhead in an execution time of the parallel program by the multi-core processor is reduced, and an in-vehicle device is enabled to execute each of the MTs in the program optimally.

公开(公告)号：US20170168790A1

公开(公告)日：2017-06-15

申请号：US15350368

申请日：2016-11-14

Applicant: DENSO CORPORATION

Inventor： Kenichi MINEDA

IPC: G06F9/45

CPC classification number: G06F8/456

Abstract: A method is for generating a parallel program for a multicore microcomputer from processes in a single program for a single core. The method includes extraction procedure, association procedure, and analysis procedure. The extraction procedure extracts (i) an extracted address of an accessed data item, which is among data items stored in a storage area together with the processes and accessed when each process is executed and (ii) an extracted symbol name of the accessed data item. The association procedure associates an associated address in the storage area storing the accessed data item of the extracted symbol name with the extracted symbol name. The analysis procedure analyzes a dependency between each process based on the extracted address and the associated address, and determines that two processes accessing an identical address have a dependency while determining that two processes not accessing an identical address have no dependency.