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    SEAMLESS UPDATE PROVISIONING FOR COMMON CHIPSETS CARRYING DIFFERENT CPU FAMILIES
    3.
    发明公开
    SEAMLESS UPDATE PROVISIONING FOR COMMON CHIPSETS CARRYING DIFFERENT CPU FAMILIES 审中-公开

    公开(公告)号：US20240134622A1

    公开(公告)日：2024-04-25

    申请号：US17970167

    申请日：2022-10-19

    Applicant: DELL PRODUCTS L.P.

    Inventor： Shekar Babu Suryanarayana ,  Anjali S ,  Karunakar Poosapalli

    IPC: G06F8/65 ,  G06F8/71

    CPC classification number: G06F8/65 ,  G06F8/71

    Abstract: A system for network management comprising a silicon management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for a plurality of silicon data processing devices and to implement an update to one or more of the silicon data processing devices, a chipset management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for a plurality of chipsets, each chipset associated with one of the silicon data processing devices and to implement an update to one or more of the chipsets and a boot system configured to cause a system associated with the updated silicon data processing devices and the updated chipsets to reboot.

    EMBEDDED CONTROLLER TO SAVE SYSTEM TELEMETRY DATA DURING SYSTEM FAILURES
    4.
    发明申请
    EMBEDDED CONTROLLER TO SAVE SYSTEM TELEMETRY DATA DURING SYSTEM FAILURES 有权

    公开(公告)号：US20250068530A1

    公开(公告)日：2025-02-27

    申请号：US18458518

    申请日：2023-08-30

    Applicant: DELL PRODUCTS L.P.

    Inventor： Adolfo S. Montero ,  Ibrahim Sayyed ,  Karunakar Poosapalli

    IPC: G06F11/22 ,  G06F9/4401

    Abstract: An information handling system includes first and second storages, a basic input/output system (BIOS), and an embedded controller. The first storage stores telemetry data associated with the information handling system. The second storage includes a boot partition. The BIOS stores the telemetry data in the first storage. The embedded controller receives the telemetry data stored in the first storage from the BIOS. The embedded controller provides the telemetry data to the boot partition of the second storage over an out-of-band communication channel.

    SECURITY FOR A SPLIT BOOT ARCHITECTURE
    5.
    发明申请
    SECURITY FOR A SPLIT BOOT ARCHITECTURE 有权

    公开(公告)号：US20250053658A1

    公开(公告)日：2025-02-13

    申请号：US18446070

    申请日：2023-08-08

    Applicant: Dell Products, L.P.

    Inventor： Karunakar Poosapalli ,  Shekar Babu Suryanarayana ,  Ibrahim Sayyed

    IPC: G06F21/57 ,  H04L9/08 ,  H04L9/14 ,  H04L9/32

    Abstract: Systems and methods for security for a split-boot architecture are described. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include: a printed circuit board; a processor coupled to the printed circuit board; and a memory coupled to the processor, wherein the memory comprises program instructions stored thereon that, upon execution by the processor, cause the IHS to: obtain one or more cryptographic keys associated with firmware onboard the printed circuit board; and verify extended firmware using the cryptographic keys.

    Dynamic operation code based agnostic analysis of initialization information
    7.
    发明授权
    Dynamic operation code based agnostic analysis of initialization information 有权

    公开(公告)号：US11954498B2

    公开(公告)日：2024-04-09

    申请号：US17671873

    申请日：2022-02-15

    Applicant: Dell Products L.P.

    Inventor： Karunakar Poosapalli ,  Sumanth Vidyadhara

    IPC: G06F9/44 ,  G06F9/4401

    CPC classification number: G06F9/4403

    Abstract: An information handling system determines a difference between a first set of initialization information and a second set of initialization information during a pre-extensible firmware interface initialization phase of a boot process that is based on a first basic input/output system (BIOS), wherein the first set of initialization information is associated with the first BIOS and the second set of initialization information is associated with a second BIOS. The system also creates and publishes a hand-off block that includes an entry which describes the difference between the first set of initialization information and the second set of initialization information. The system parses the hand-off block during a driver execution environment phase to determine the difference between the first set of initialization information and the second set of initialization information, wherein the hand-off block is passed from the pre-extensible firmware interface initialization phase of the boot process. The system then updates the first set of initialization information based on the difference during the driver execution environment phase before continuing the boot process with the second BIOS using updated initialization information.

    FAULT TOLERANCE AND DEBUG ANALYSIS DURING A BOOT PROCESS
    10.
    发明公开
    FAULT TOLERANCE AND DEBUG ANALYSIS DURING A BOOT PROCESS 审中-公开

    公开(公告)号：US20230267044A1

    公开(公告)日：2023-08-24

    申请号：US17675215

    申请日：2022-02-18

    Applicant: Dell Products L.P.

    Inventor： Sumanth Vidyadhara ,  Karunakar Poosapalli

    IPC: G06F11/14 ,  G06F9/4401

    CPC classification number: G06F11/1417 ,  G06F9/4403 ,  G06F2201/805

    Abstract: An information handling system may detect an exception, create a hand-off block in an NVMe boot partition in an NVMe device during a pre-extensible firmware interface phase of a boot process, and update the hand-off block with information associated with the exception. The system may also load an exception table to the NVMe boot partition, wherein the exception table includes an index associated with the exception that is mapped to a vector associated with an exception handler, and load the exception handler to the NVMe boot partition, wherein the exception handler resolves the exception.

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