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公开(公告)号:US20240275372A1
公开(公告)日:2024-08-15
申请号:US18109402
申请日:2023-02-14
Applicant: Delphi Technologies IP Limited
IPC: H03K17/06 , H03K17/0412 , H03K17/16
CPC classification number: H03K17/063 , H03K17/04123 , H03K17/165 , H03K2217/0063 , H03K2217/0072
Abstract: A discrete relay driver circuit that includes a first high side gate drive circuit configured to drive a first high side MOSFET and a second high side gate drive circuit configured to drive a second high side MOSFET. The discrete relay driver circuit also includes a first resistor divider configured to sense voltage from the first high side MOSFET, a second resistor divider configured to sense voltage from the second high side MOSFET, and a first low side gate driver circuit configured to drive a first low side MOSFET. The discrete relay driver circuit also includes a second low side gate driver circuit configured to drive a second low side MOSFET based on a first low side enable signal, and a third low side gate driver circuit configured to drive a third low side MOSFET based on a second low side enable signal.
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公开(公告)号:US12088284B2
公开(公告)日:2024-09-10
申请号:US18109402
申请日:2023-02-14
Applicant: Delphi Technologies IP Limited
IPC: H03K17/06 , H03K17/0412 , H03K17/16
CPC classification number: H03K17/063 , H03K17/04123 , H03K17/165 , H03K2217/0063 , H03K2217/0072
Abstract: A discrete relay driver circuit that includes a first high side gate drive circuit configured to drive a first high side MOSFET and a second high side gate drive circuit configured to drive a second high side MOSFET. The discrete relay driver circuit also includes a first resistor divider configured to sense voltage from the first high side MOSFET, a second resistor divider configured to sense voltage from the second high side MOSFET, and a first low side gate driver circuit configured to drive a first low side MOSFET. The discrete relay driver circuit also includes a second low side gate driver circuit configured to drive a second low side MOSFET based on a first low side enable signal, and a third low side gate driver circuit configured to drive a third low side MOSFET based on a second low side enable signal.
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