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公开(公告)号:US20240275372A1
公开(公告)日:2024-08-15
申请号:US18109402
申请日:2023-02-14
Applicant: Delphi Technologies IP Limited
IPC: H03K17/06 , H03K17/0412 , H03K17/16
CPC classification number: H03K17/063 , H03K17/04123 , H03K17/165 , H03K2217/0063 , H03K2217/0072
Abstract: A discrete relay driver circuit that includes a first high side gate drive circuit configured to drive a first high side MOSFET and a second high side gate drive circuit configured to drive a second high side MOSFET. The discrete relay driver circuit also includes a first resistor divider configured to sense voltage from the first high side MOSFET, a second resistor divider configured to sense voltage from the second high side MOSFET, and a first low side gate driver circuit configured to drive a first low side MOSFET. The discrete relay driver circuit also includes a second low side gate driver circuit configured to drive a second low side MOSFET based on a first low side enable signal, and a third low side gate driver circuit configured to drive a third low side MOSFET based on a second low side enable signal.
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公开(公告)号:US12088284B2
公开(公告)日:2024-09-10
申请号:US18109402
申请日:2023-02-14
Applicant: Delphi Technologies IP Limited
IPC: H03K17/06 , H03K17/0412 , H03K17/16
CPC classification number: H03K17/063 , H03K17/04123 , H03K17/165 , H03K2217/0063 , H03K2217/0072
Abstract: A discrete relay driver circuit that includes a first high side gate drive circuit configured to drive a first high side MOSFET and a second high side gate drive circuit configured to drive a second high side MOSFET. The discrete relay driver circuit also includes a first resistor divider configured to sense voltage from the first high side MOSFET, a second resistor divider configured to sense voltage from the second high side MOSFET, and a first low side gate driver circuit configured to drive a first low side MOSFET. The discrete relay driver circuit also includes a second low side gate driver circuit configured to drive a second low side MOSFET based on a first low side enable signal, and a third low side gate driver circuit configured to drive a third low side MOSFET based on a second low side enable signal.
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公开(公告)号:US11563398B1
公开(公告)日:2023-01-24
申请号:US17448626
申请日:2021-09-23
Applicant: Delphi Technologies IP Limited
Inventor: Karthik Naik , Miang Keng Yoon , Neil van Zyl
IPC: H02P27/08 , H02P29/028
Abstract: A system includes a control board comprising: a microprocessor configured to output a PWM signal; a primary shutoff path circuit, an upper MOSFET shutoff circuit, and a lower MOSFET shutoff circuit, each of the circuits configured to receive the PWM signal; a first buffer provided at an output of the primary shutoff path circuit; a second buffer provided at an output of the upper MOSFET shutoff circuit; a third buffer provided at an output of the lower MOSFET shutoff circuit; a first resistor and a second resistor provided in parallel at the first buffer and configured to provide a first feedback signal; a third resistor and a fourth resistor provided in parallel at the second buffer and configured to provide a second feedback signal; and a fifth resistor and a sixth resistor provided in parallel at the third buffer and configured to provide a third feedback signal.
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