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公开(公告)号：US20140355215A1
公开(公告)日：2014-12-04
申请号：US13908209
申请日：2013-06-03
Applicant: Dialog Semiconductor GmbH
Inventor： Baltazar Canete , Melvin Martin , Ian Kent
CPC classification number: H05K3/30 , H01L21/4857 , H01L21/486 , H01L21/4882 , H01L23/3128 , H01L23/3677 , H01L23/49822 , H01L23/49827 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L2224/16225 , H01L2224/16235 , H01L2224/29144 , H01L2224/29147 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48235 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H05K1/0204 , H05K3/4602 , H05K2201/10416 , H05K2201/10674 , Y10T29/49128 , H01L2924/01046 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: An electronic package is fabricated wherein a substrate is provided having three or more layers. A heat slug is embedded completely within the substrate. A die is attached above the substrate. Thermal paths to the heat slug are linked through the ground signal interconnects (traces, vias and planes).
Abstract translation: 制造电子封装，其中提供具有三层或更多层的衬底。 散热片完全嵌入基板内。 模具附着在基板上。 通过接地信号互连（迹线，通孔和平面）连接到散热片的热路径。
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公开(公告)号：US09929130B2
公开(公告)日：2018-03-27
申请号：US15299910
申请日：2016-10-21
Applicant: Dialog Semiconductor GmbH
Inventor： Ian Kent
IPC: H01L21/56 , H01L25/00 , H01L23/00 , H01L23/13 , H01L23/31 , H01L25/065 , H01L25/16 , H01L23/29 , H01L23/498
CPC classification number: H01L25/50 , H01L21/563 , H01L21/565 , H01L23/13 , H01L23/293 , H01L23/3128 , H01L23/49816 , H01L23/49866 , H01L23/49894 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/16 , H01L2224/13147 , H01L2224/1403 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06568 , H01L2924/12042 , H01L2924/15153 , H01L2924/15156 , H01L2924/15159 , H01L2924/15311 , H01L2924/15313 , H01L2924/1579 , H01L2924/181 , H01L2924/18161 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19051 , H01L2924/19103 , H01L2924/19104 , H01L2924/35121 , H01L2924/00
Abstract: An integrated passive device and power management integrated circuit are directly connected, active surface to active surface, resulting in a pyramid die stack. The die stack is flip-chip attached to a laminate substrate having a cavity drilled therein wherein the smaller die fits into the cavity. The die to die attach is not limited to IPD and PMIC and can be used for other die types as required.
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3.发明申请Chip on Chip Attach (Passive IPD and PMIC) Flip Chip BGA Using New Cavity BGA Substrate 审中-公开芯片贴片（被动IPD和PMIC）倒装芯片BGA使用新的腔BGA衬底公开(公告)号：US20170040309A1
公开(公告)日：2017-02-09
申请号：US15299910
申请日：2016-10-21
Applicant: Dialog Semiconductor GmbH
Inventor： Ian Kent
IPC: H01L25/00 , H01L23/498 , H01L23/00 , H01L21/56 , H01L23/29 , H01L25/16 , H01L25/065 , H01L23/31
CPC classification number: H01L25/50 , H01L21/563 , H01L21/565 , H01L23/13 , H01L23/293 , H01L23/3128 , H01L23/49816 , H01L23/49866 , H01L23/49894 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/16 , H01L2224/13147 , H01L2224/1403 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06568 , H01L2924/12042 , H01L2924/15153 , H01L2924/15156 , H01L2924/15159 , H01L2924/15311 , H01L2924/15313 , H01L2924/1579 , H01L2924/181 , H01L2924/18161 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19051 , H01L2924/19103 , H01L2924/19104 , H01L2924/35121 , H01L2924/00
Abstract: An integrated passive device and power management integrated circuit are directly connected, active surface to active surface, resulting in a pyramid die stack. The die stack is flip-chip attached to a laminate substrate having a cavity drilled therein wherein the smaller die fits into the cavity. The die to die attach is not limited to IPD and PMIC and can be used for other die types as required.
Abstract translation: 一个集成的无源器件和电源管理集成电路直接连接，主动表面到有源表面，产生一个金字塔管芯堆叠。 芯片堆叠被倒装连接到具有在其中钻出的空腔的层压基板，其中较小的管芯装配到空腔中。 裸片附着不限于IPD和PMIC，并可根据需要用于其他模具类型。
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4.发明申请Chip on Chip Attach (Passive IPD and PMIC) Flip Chip BGA Using New Cavity BGA Substrate 审中-公开芯片贴片（被动IPD和PMIC）倒装芯片BGA使用新的腔BGA衬底公开(公告)号：US20140246773A1
公开(公告)日：2014-09-04
申请号：US13790437
申请日：2013-03-08
Applicant: DIALOG SEMICONDUCTOR GMBH
Inventor： Ian Kent
IPC: H01L23/00
CPC classification number: H01L25/50 , H01L21/563 , H01L21/565 , H01L23/13 , H01L23/293 , H01L23/3128 , H01L23/49816 , H01L23/49866 , H01L23/49894 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/16 , H01L2224/13147 , H01L2224/1403 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06568 , H01L2924/12042 , H01L2924/15153 , H01L2924/15156 , H01L2924/15159 , H01L2924/15311 , H01L2924/15313 , H01L2924/1579 , H01L2924/181 , H01L2924/18161 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19051 , H01L2924/19103 , H01L2924/19104 , H01L2924/35121 , H01L2924/00
Abstract: An integrated passive device and power management integrated circuit are directly connected, active surface to active surface, resulting in a pyramid die stack. The die stack is flip-chip attached to a laminate substrate having a cavity drilled therein wherein the smaller die fits into the cavity. The die to die attach is not limited to IPD and PMIC and can be used for other die types as required.
Abstract translation: 一个集成的无源器件和电源管理集成电路直接连接，主动表面到有源表面，产生一个金字塔管芯堆叠。 芯片堆叠被倒装连接到具有在其中钻出的空腔的层压基板，其中较小的管芯装配到空腔中。 裸片附着不限于IPD和PMIC，并可根据需要用于其他模具类型。
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