公开(公告)号：US20180108642A1

公开(公告)日：2018-04-19

申请号：US15292552

申请日：2016-10-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wolfgang SAUTER ,  Igor ARSOVSKI

IPC: H01L25/18 ,  H01L25/00 ,  H01L23/34 ,  G11C5/02

CPC classification number: H01L25/18 ,  G11C5/02 ,  H01L23/147 ,  H01L23/345 ,  H01L25/50

Abstract: A method for integrating heaters in high bandwidth memory (HBM) applications and the related devices are provided. Embodiments include forming a silicon (Si) interposer over a substrate; forming HBM and an integrated circuit (IC) over the Si interposer; forming a heater on the Si interposer in a space between the HBM and Si interposer; and utilizing one or more temperature sensors in the HBM to monitor a temperature of the HBM.

公开(公告)号：US20210111141A1

公开(公告)日：2021-04-15

申请号：US16599738

申请日：2019-10-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wolfgang SAUTER ,  Mark W. KUEMERLE ,  Eric W. TREMBLE

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to partitioned substrates with interconnect bridge structures and methods of manufacture. The structure includes: a plurality of substrates; at least one chip bonded and electrically connected to each of the plurality of substrates; and an interconnect bridge that physically connects the plurality of substrates and electrically connects each of the plurality of chips bonded to each of the plurality of substrates.

公开(公告)号：US20180164508A1

公开(公告)日：2018-06-14

申请号：US15874210

申请日：2018-01-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jeffrey P. GAMBINO ,  Wolfgang SAUTER ,  Christopher D. MUZZY ,  Charles L. ARVIN ,  Robert LEIDY

IPC: G02B6/34 ,  G02B6/13 ,  G02B6/30 ,  G02B6/124

CPC classification number: G02B6/34 ,  G02B6/124 ,  G02B6/13 ,  G02B6/30

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photonics chips and methods of manufacture. A structure includes: a photonics chip having a grated optical coupler; an interposer attached to the photonics chip, the interposer having a grated optical coupler; an optical epoxy material provided between the grated optical coupler of the photonics chip and the grated optical coupler of the interposer; and epoxy underfill material provided at interstitial regions between the photonics chip and the interposer which lie outside of an area of the grated optical couplers of the photonics chip and the interposer.