公开(公告)号：US20210336050A1

公开(公告)日：2021-10-28

申请号：US17238553

申请日：2021-04-23

Applicant: GenXComm, Inc.

Inventor： Brian Mattis ,  Ke Liu ,  Taran Huffman

IPC: H01L29/788 ,  G02B6/12 ,  G02B6/122 ,  H01L27/11521

Abstract: A semiconductor device includes a floating gate that can be charged in a nonvolatile manner. The floating gate is also structured as an optical waveguide, and maybe optically coupled to a photonic circuit, such as an interferometer.

公开(公告)号：US20200209476A1

公开(公告)日：2020-07-02

申请号：US16406541

申请日：2019-05-08

Applicant: GenXComm, Inc

Inventor： Brian Mattis ,  Taran Huffman ,  Jason Andrach ,  Hussein Nili ,  George Palmer

IPC: G02B6/136 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/683 ,  H01L21/78

Abstract: A dicing system and methods may include a novel way to separate die on a wafer in preparation for packaging that results in smooth diced edges. This is specifically advantageous, but not limited to, edge-coupled photonic chips. This method etches from the front side of the wafer and dices from the back side of the wafer to create a complete separation of die. It creates an optically smooth surface on the front side of the wafer at the location of the optical device (waveguides or other) which enables direct mounting of adjacent devices with low coupling loss and low optical scattering. The backside dicing may be wider than the front side etch, so as to recess this sawed surface and prevent it from protruding outward, resulting in rough surfaces inhibiting a direct joining of adjacent devices.

公开(公告)号：US11150409B2

公开(公告)日：2021-10-19

申请号：US16406541

申请日：2019-05-08

Applicant: GenXComm, Inc

Inventor： Brian Mattis ,  Taran Huffman ,  Jason Andrach ,  Hussein Nili ,  George Palmer

IPC: H01L23/00 ,  G02B6/136 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/78 ,  H01L21/308 ,  G02B6/12

Abstract: A dicing system and methods may include a novel way to separate die on a wafer in preparation for packaging that results in smooth diced edges. This is specifically advantageous, but not limited to, edge-coupled photonic chips. This method etches from the front side of the wafer and dices from the back side of the wafer to create a complete separation of die. It creates an optically smooth surface on the front side of the wafer at the location of the optical device (waveguides or other) which enables direct mounting of adjacent devices with low coupling loss and low optical scattering. The backside dicing may be wider than the front side etch, so as to recess this sawed surface and prevent it from protruding outward, resulting in rough surfaces inhibiting a direct joining of adjacent devices.

公开(公告)号：US20240008271A1

公开(公告)日：2024-01-04

申请号：US17977939

申请日：2022-10-31

Applicant: GenXComm, Inc.

Inventor： Brian Mattis ,  Taran Huffman ,  Bryan Woo ,  Thien-An Ngoc Nguyen

IPC: H01L27/11526 ,  G02B6/43 ,  G02B6/42

CPC classification number: H01L27/11526 ,  G02B6/43 ,  G02B6/4202 ,  G02B6/4277

Abstract: A semiconductor device includes a floating gate that can be charged in a nonvolatile manner. The floating gate is also structured as an optical waveguide, and may be optically coupled to a photonic circuit, such as an interferometer.

公开(公告)号：US20230333009A1

公开(公告)日：2023-10-19

申请号：US18135692

申请日：2023-04-17

Applicant: GenXComm, inc.

Inventor： Brian Mattis ,  Taran Huffman

IPC: G01N21/31 ,  B01L3/00 ,  G02B6/125

CPC classification number: G01N21/31 ,  B01L3/502715 ,  G02B6/125 ,  B01L2300/0654 ,  B01L2300/168 ,  G01N2201/06113

Abstract: A photonic circuit and electronic device incorporating the same including a waveguide defining different regions having different widths and cladding thicknesses. The width and cladding thickness in a particular region are configured to loosely confine light in a first set of conditions and to tightly/highly confine light in a second set of conditions. The first and second set of conditions can correspond to the waveguide being positioned proximate to different materials having different indices of refraction.

公开(公告)号：US20230130434A1

公开(公告)日：2023-04-27

申请号：US17737178

申请日：2022-05-05

Applicant: GENXCOMM, INC.

Inventor： Farzad Mokhtari-Koushyar ,  Thien-An Ngoc Nguyen ,  Taran Huffman ,  Brian Mattis

IPC: H04B10/508 ,  G02B6/12 ,  H04B10/50

Abstract: A signal generator includes a photonic circuit configured to output a sequence of solitons at a known rate. The solitons illuminate a high-speed photodiode that, in response, generates an electrical signal, such as a sinusoidal signal, which can be provided as input to a direct digital synthesizer configured to output successive phases of a selected waveform in response to electrical stimulus.

公开(公告)号：US20240004133A1

公开(公告)日：2024-01-04

申请号：US18469710

申请日：2023-09-19

Applicant: GenXComm, Inc.

Inventor： Brian Mattis ,  Taran Huffman ,  Bryan Woo ,  Thien-An Nguyen

IPC: G02B6/136

CPC classification number: G02B6/136 ,  G02B2006/12061

Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.

公开(公告)号：US11838056B2

公开(公告)日：2023-12-05

申请号：US17737178

申请日：2022-05-05

Applicant: GENXCOMM, INC.

Inventor： Farzad Mokhtari-Koushyar ,  Thien-An Nguyen ,  Taran Huffman ,  Brian Mattis

IPC: H04B10/508 ,  G02B6/12 ,  H04B10/50 ,  G02B6/293

CPC classification number: H04B10/508 ,  G02B6/12004 ,  G02B6/12007 ,  H04B10/503 ,  G02B6/29352 ,  G02B2006/12061

Abstract: A signal generator includes a photonic circuit configured to output a sequence of solitons at a known rate. The solitons illuminate a high-speed photodiode that, in response, generates an electrical signal, such as a sinusoidal signal, which can be provided as input to a direct digital synthesizer configured to output successive phases of a selected waveform in response to electrical stimulus.

公开(公告)号：US11796737B2

公开(公告)日：2023-10-24

申请号：US17177798

申请日：2021-02-17

Applicant: GenXComm, Inc.

Inventor： Brian Mattis ,  Taran Huffman ,  Bryan Woo ,  Thien-An Nguyen

IPC: G02B6/136 ,  G02B6/12

CPC classification number: G02B6/136 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12169 ,  G02B2006/12188 ,  G02B2006/12197

Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.