公开(公告)号：US20140138849A1

公开(公告)日：2014-05-22

申请号：US14162959

申请日：2014-01-24

Applicant: HARRIS CORPORATION

Inventor： LOUIS JOSEPH RENDEK, JR. ,  MICHAEL RAYMOND WEATHERSPOON ,  CASEY PHILIP RODRIGUEZ ,  DAVID NICOL

IPC: H01L23/00

CPC classification number: H01L24/83 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/33 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/11422 ,  H01L2224/1148 ,  H01L2224/13021 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0306 ,  H05K3/281 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0141 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49144 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/25 ,  Y10T428/31721 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract translation: 制造电子器件的方法包括在刚性晶片衬底上形成互连层堆叠，所述刚性晶片衬底具有多个图案化电导体层，相邻图案化电导体层之间的介电层，以及位于最上图案化电导体层上的至少一个焊盘 。 形成具有与至少一个焊盘对准的至少一个孔的LCP焊接掩模。 将LCP焊接掩模和互连层堆叠对齐并层压在一起。 焊料定位在至少一个孔中。 使用焊料将至少一个电路部件连接到至少一个焊盘。

公开(公告)号：US20150053468A1

公开(公告)日：2015-02-26

申请号：US14532224

申请日：2014-11-04

Applicant: HARRIS CORPORATION

Inventor： MICHAEL RAYMOND WEATHERSPOON ,  LOUIS JOSEPH RENDEK, JR. ,  LAWRENCE WAYNE SHACKLETTE ,  CASEY PHILIP RODRIGUEZ

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09

CPC classification number: H05K1/0298 ,  H05K1/09 ,  H05K1/116 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0141 ,  H05K2201/09545 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method for making a multilayer circuit board from circuit board layers, each including a dielectric layer and conductive traces thereon including a first metal. The method includes forming a through-via in a first circuit board layer, plating the through-via with the first metal, and coating a second metal onto the first metal of the first circuit board layer, the plated through-via, and the first metal. The method also includes aligning the first and second circuit board layers together so that the plated through-via of the first circuit board layer is adjacent a feature on the second circuit board layer, and heating and pressing the aligned first and second circuit board layers so as to laminate the dielectric layers together and form an intermetallic compound of the first and second metals bonding adjacent metal portions.

Abstract translation: 一种从电路板层制造多层电路板的方法，每个电路板包括电介质层和其上包括第一金属的导电迹线。 该方法包括在第一电路板层中形成通孔，将通孔与第一金属电镀，并将第二金属涂覆在第一电路板层的第一金属上，镀通孔和第一金属 金属。 该方法还包括将第一和第二电路板层对准在一起，使得第一电路板层的电镀通孔与第二电路板层上的特征相邻，并且加热并压紧对准的第一和第二电路板层 以将电介质层层合在一起并形成接合相邻金属部分的第一和第二金属的金属间化合物。

公开(公告)号：US20160174371A1

公开(公告)日：2016-06-16

申请号：US15049363

申请日：2016-02-22

Applicant: HARRIS CORPORATION

Inventor： LOUIS JOSEPH RENDEK, JR. ,  TRAVIS L. KERBY ,  CASEY PHILIP RODRIGUEZ ,  MICHAEL RAYMOND WEATHERSPOON

IPC: H05K1/11 ,  H05K1/09 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/111 ,  H01L21/4846 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/1134 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16237 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/8112 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/81855 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83204 ,  H01L2224/83359 ,  H01L2224/8388 ,  H01L2224/9211 ,  H01L2924/12042 ,  H01L2924/381 ,  H05K1/0346 ,  H05K1/09 ,  H05K1/181 ,  H05K3/287 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0141 ,  H05K2201/10098 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2201/10212 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.

公开(公告)号：US20170339785A1

公开(公告)日：2017-11-23

申请号：US15673696

申请日：2017-08-10

Applicant: HARRIS CORPORATION

Inventor： LOUIS JOSEPH RENDEK, JR. ,  TRAVIS L. KERBY ,  CASEY PHILIP RODRIGUEZ

IPC: H05K1/03 ,  H05K1/18 ,  H01L23/498 ,  H05K3/28 ,  H05K3/34 ,  H05K1/11 ,  H01L21/48 ,  H01L23/00

CPC classification number: H05K1/03 ,  H01L21/4867 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/13599 ,  H01L2224/16111 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0313 ,  H05K1/032 ,  H05K1/111 ,  H05K1/181 ,  H05K3/281 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0141 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

公开(公告)号：US20140321089A1

公开(公告)日：2014-10-30

申请号：US14324487

申请日：2014-07-07

Applicant: HARRIS CORPORATION

Inventor： LOUIS JOSEPH RENDEK, JR. ,  TRAVIS L. KERBY ,  CASEY PHILIP RODRIGUEZ

IPC: H05K1/03 ,  H05K1/11

CPC classification number: H05K1/03 ,  H01L21/4867 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/13599 ,  H01L2224/16111 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/032 ,  H05K1/111 ,  H05K1/181 ,  H05K3/281 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0141 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract translation: 制造电子器件的方法包括在液晶聚合物（LCP）衬底上形成电路层并具有至少一个焊盘。 该方法还包括形成具有至少一个孔的LCP焊接掩模，其中可与至少一个焊盘对准。 该方法还包括将LCP焊接掩模和LCP衬底对准和层叠在一起，然后将焊膏定位在至少一个孔中。 然后可以使用焊膏将至少一个电路部件附接到至少一个焊盘。