公开(公告)号：US20230141467A1

公开(公告)日：2023-05-11

申请号：US17680267

申请日：2022-02-24

Applicant: Huazhong University of Science and Technology

Inventor： Weihua GUO ,  Xiangyang DAI ,  Qiaoyin LU

IPC: G02B6/13 ,  G02B6/122 ,  H05K1/14 ,  H05K3/36

CPC classification number: G02B6/13 ,  G02B6/1228 ,  H05K1/144 ,  H05K3/368 ,  H05K2201/041

Abstract: A hybrid integration method includes: assembling a motherboard chip, assembling a daughterboard chip, and assembling an integrated chip. The motherboard chip includes a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region arranged on the motherboard chip body, and the first waveguide region includes a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other; the daughterboard chip includes a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region arranged on the daughterboard chip body, and the second waveguide region includes a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other.