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公开(公告)号：US10262930B2
公开(公告)日：2019-04-16
申请号：US15492291
申请日：2017-04-20
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara
Abstract: An interposer includes an insulating layer, conductor circuits formed in grooves formed on a first surface of the insulating layer respectively, and metal posts formed in openings extending from the grooves to a second surface of the insulating layer on the opposite side with respect to the first surface such that the metal posts are connected to the conductor circuits respectively. The insulating layer has an opening portion which accommodates an electronic component and is extending from the first surface to the second surface of the insulating layer, and each of the metal posts has an upper surface and a bottom surface on the opposite side of the upper surface such that the upper surface is connected to a respective one of the conductor circuits and that the bottom surface is exposed from the second surface of the insulating layer.
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Patent Agency Ranking
公开(公告)号：US10398038B2
公开(公告)日：2019-08-27
申请号：US15793084
申请日：2017-10-25
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara , Naoki Kurahashi
Abstract: A printed wiring board includes a laminate, conductor posts formed on a surface of the laminate, and a mold resin layer formed on the surface of the laminate such that the posts are in the mold layer covering side surfaces of the posts. The laminate includes conductor layers and one or more resin insulating layers, the conductor layers includes a first conductor layer embedded in a resin insulating layer forming the surface of the laminate and has one surface exposed on the surface of the laminate, the first conductor layer includes first and second conductor pads such that the second pads are formed on outer peripheral side of the first pads, the mold layer has a cavity exposing the first pads, the posts are formed on the second pads on the surface of the laminate, and the first conductor layer includes fan-out wirings extending from inside to outside the cavity.
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公开(公告)号：US09668361B2
公开(公告)日：2017-05-30
申请号：US14261804
申请日：2014-04-25
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara
CPC classification number: H05K3/426 , H05K2201/09563 , H05K2203/072 , H05K2203/0723
Abstract: A printed wiring board includes an insulative resin substrate having a penetrating hole, a first conductive layer formed on first surface of the substrate, a second conductive layer formed on second surface of the substrate, and a through-hole conductor formed in the hole such that the conductor is connecting the first and second conductive layers. The conductor has a seed layer on inner wall of the hole, a laminated plated layer on the seed layer and a filled plated layer on the laminated layer, the laminated layer is formed such that the laminated layer is closing center portion of the hole and forming recess at end of the hole, the filled layer is formed such that the filled layer is filling the recess, and the laminated layer includes multiple electrolytic plated films laminated along the seed layer and each having thickness which is less at edge than at center.
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公开(公告)号：US09313901B2
公开(公告)日：2016-04-12
申请号：US14446702
申请日：2014-07-30
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara , Yasuki Kimishima
CPC classification number: H05K3/427 , H05K1/0366 , H05K3/0047 , H05K3/429 , H05K3/4602 , H05K2201/0355 , H05K2201/09536 , H05K2203/1476 , H05K2203/1492
Abstract: A printed wiring board includes an insulative resin substrate having a penetrating hole, a first conductive layer formed on first surface of the substrate, a second conductive layer formed on second surface of the substrate on the opposite side, and a through-hole conductor formed in the penetrating hole and connecting the first and second conductive layers. The through-hole conductor includes a seed layer on inner wall of the penetrating hole, a first electrolytic plated layer on the seed layer such that the first plated layer is filling the space formed by the seed layer in the penetrating hole and forming recesses at the ends of the penetrating hole, respectively, and second electrolytic plated layers filling the recesses, respectively, and the second plated layers includes electrolytic plating having an average crystalline particle diameter greater than an average crystalline particle diameter of electrolytic plating forming the first plated layer.
Abstract translation: 印刷电路板包括具有贯通孔的绝缘树脂基板，形成在基板的第一表面上的第一导电层，在相对侧的基板的第二表面上形成的第二导电层和形成在 穿透孔并连接第一和第二导电层。 所述通孔导体在所述贯通孔的内壁上具有种子层，所述种子层上的第一电解电镀层使得所述第一镀层在所述贯通孔中填充由所述籽晶层形成的空间， 并且第二镀层分别包括平均结晶粒径大于形成第一镀层的电解电镀的平均结晶粒径的电解电镀。
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公开(公告)号：US10051740B2
公开(公告)日：2018-08-14
申请号：US15819133
申请日：2017-11-21
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara , Naoki Kurahashi
Abstract: A wiring substrate includes a first substrate including a first conductive circuit layer, a second substrate including a second conductive circuit layer, and a substrate fixing structure fixing the first substrate and the second substrate to each other such that the first substrate and the second substrate are superposed on each other. The first conductive layer in the first substrate includes a first counter electrode, the second conductive layer in the second substrate includes a second counter electrode, and the first and second substrates have a hollow space formed such that the first and second counter electrodes are positioned to oppose each other across the hollow space and that the first and second substrates have a dividing plane intersecting the hollow space and dividing the first and second substrates.
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公开(公告)号：US20180146554A1
公开(公告)日：2018-05-24
申请号：US15819133
申请日：2017-11-21
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki Kajihara , Naoki Kurahashi
CPC classification number: H05K1/144 , H01L21/4857 , H01L23/49822 , H05K1/0243 , H05K1/028 , H05K1/111 , H05K1/115 , H05K1/162 , H05K1/165 , H05K3/4007 , H05K3/462 , H05K3/4638 , H05K3/4697 , H05K2201/09063 , H05K2201/096 , H05K2203/166
Abstract: A wiring substrate includes a first substrate including a first conductive circuit layer, a second substrate including a second conductive circuit layer, and a substrate fixing structure fixing the first substrate and the second substrate to each other such that the first substrate and the second substrate are superposed on each other. The first conductive layer in the first substrate includes a first counter electrode, the second conductive layer in the second substrate includes a second counter electrode, and the first and second substrates have a hollow space formed such that the first and second counter electrodes are positioned to oppose each other across the hollow space and that the first and second substrates have a dividing plane intersecting the hollow space and dividing the first and second substrates.
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