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公开(公告)号：US20230164925A1
公开(公告)日：2023-05-25
申请号：US17456417
申请日：2021-11-24
Applicant: IBIDEN CO., LTD.
Inventor： Katsuhiko TANNO , Akifumi SHIKANO , Satoru KAWAI
CPC classification number: H05K3/422 , H05K3/06 , C23C28/32 , C23C18/1689 , C25D5/022 , C25D5/34 , C25D5/48 , H05K2203/095
Abstract: A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.
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公开(公告)号：US20150156888A1
公开(公告)日：2015-06-04
申请号：US14555909
申请日：2014-11-28
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI
CPC classification number: C25D5/18 , C23C18/1653 , C25D3/38 , C25D5/02 , C25D7/00 , H01L21/2885 , H05K3/423 , H05K3/427 , H05K2201/09827 , H05K2203/1492 , H05K2203/1572
Abstract: A method for manufacturing a printed wiring board includes forming a through hole in an insulating substrate such that the hole extends from first surface of the substrate to second surface of the substrate on the opposite side, forming a seed layer on the first and second surfaces and wall of the hole, and applying pulse plating to the substrate via the seed layer such that a through-hole conductor is formed in the hole. The applying of the pulse plating includes flowing forward and reverse current on the first and second surfaces of the substrate such that when the forward current flows on the first surface of the substrate, the reverse current flows on the second surface of the substrate and that when the reverse current flows on the first surface of the substrate, the forward current flows on the second surface of the substrate.
Abstract translation: 一种制造印刷电路板的方法，包括在绝缘基板中形成通孔，使得孔从基板的第一表面延伸到相对侧的基板的第二表面，在第一和第二表面上形成晶种层， 孔，并通过种子层向基板施加脉冲电镀，使得在孔中形成通孔导体。 施加脉冲电镀包括在衬底的第一和第二表面上的正向和反向电流，使得当正向电流在衬底的第一表面上流动时，反向电流在衬底的第二表面上流动，并且当 反向电流在衬底的第一表面上流动，正向电流在衬底的第二表面上流动。
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公开(公告)号：US20210329783A1
公开(公告)日：2021-10-21
申请号：US17230457
申请日：2021-04-14
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI , Yasuki KIMISHIMA
IPC: H05K1/11
Abstract: A printed wiring board includes an insulating substrate having openings, a first conductor layer formed on a first surface of the insulating substrate, a second conductor layer formed on a second surface of the insulating substrate, magnetic material portions formed in the openings of the insulating substrate and having through holes extending from the first surface to second surface of the insulating substrate, and through-hole conductors formed on side walls of the through holes such that the through-hole conductors connect the first conductor layer and second conductor layer. The magnetic material portions include magnetic particles and resin such that the magnetic particles include particles forming the side walls and that gaps are formed between the particles and the resin, and each of the through-hole conductors includes a chemical copper plating film such that the chemical copper plating film is deposited in the gaps formed between the particles and the resin.
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公开(公告)号：US20210185818A1
公开(公告)日：2021-06-17
申请号：US17106321
申请日：2020-11-30
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI
Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening formed in the core substrate such that the magnetic resin has second through holes formed therein, a first through-hole conductor formed in the first through hole of the core substrate and including a metal film formed in the first through hole of the core substrate, and second through-hole conductors formed in the second through holes of the magnetic resin and including metal films formed in the second through holes of the magnetic resin, respectively.
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公开(公告)号：US20210298178A1
公开(公告)日：2021-09-23
申请号：US17184865
申请日：2021-02-25
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI , Yasuki KIMISHIMA
Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole, and a second through-hole conductor including a metal film formed in the second through hole. The core substrate and the magnetic resin are formed such that a surface in the first through hole has a roughness that is larger than a roughness of a surface in the second through hole.
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Patent Agency Ranking
公开(公告)号：US20210259107A1
公开(公告)日：2021-08-19
申请号：US17132376
申请日：2020-12-23
Applicant: IBIDEN CO., LTD.
Inventor： Yasuki KIMISHIMA , Satoru KAWAI
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.
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公开(公告)号：US20210136914A1
公开(公告)日：2021-05-06
申请号：US17080898
申请日：2020-10-27
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI
IPC: H05K1/11
Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and having a conductor pad, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has an opening exposing the conductor pad in the conductor layer, and a bump formed on the conductor pad of the conductor layer and including a base plating layer formed in the opening of the solder resist layer, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer such that that the base plating layer has a side surface exposed from the solder resist layer and that the intermediate layer has a side surface protruding from the side surface of the base plating layer.
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公开(公告)号：US20230080335A1
公开(公告)日：2023-03-16
申请号：US17823210
申请日：2022-08-30
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI , Katsuhiko TANNO , Susumu KAGOHASHI , Kentaro WADA
Abstract: A printed wiring board includes a resin insulating layer including resin and particles, and a conductor layer formed on a surface of the resin insulating layer. The particles in the resin insulating layer include first particles and second particles such that the first particles are partially embedded in the resin and the second particles are completely embedded in the resin, and the resin insulating layer is formed such that the first particles has exposed surfaces exposed from the resin and covered surfaces covered by the resin, respectively, the surface of the resin insulating layer includes the first exposed surfaces, and a ratio of a second area to a first area is in a range of 0.1 to 0.25 where the first area is an area of the surface of the resin insulating layer, and the second area is obtained by summing areas of the exposed surfaces of the first particles.
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公开(公告)号：US20230070624A1
公开(公告)日：2023-03-09
申请号：US17822319
申请日：2022-08-25
Applicant: IBIDEN CO., LTD.
Inventor： Shuhei GOTO , Satoru KAWAI
IPC: H01L23/498
Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on the insulating layer and including a conductor pad, and a solder resist layer formed on the insulating layer such that the solder resist layer has an opening entirely exposing an upper surface and a side surface of the conductor pad. The conductor layer is formed such that the conductor pad has a pad body extending along a surface of the insulating layer, and a protective layer covering an upper surface and a side surface of the pad body and including material different from material of the pad body, and the pad body of the conductor pad has a notch part formed at a peripheral edge portion of the pad body such that the notch part separates a lower surface of the pad body and the surface of the insulating layer and is filled with the protective layer.
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公开(公告)号：US20220330428A1
公开(公告)日：2022-10-13
申请号：US17709492
申请日：2022-03-31
Applicant: IBIDEN CO., LTD.
Inventor： Satoru KAWAI
Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and including conductor pads, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and having openings exposing the conductor pads, respectively, and plating bumps formed on the conductor pads such that each of the plating bumps includes a base plating layer formed in a respective one of the openings of the solder resist layer, and a top plating layer formed on the base plating layer. The plating bumps are formed such that the base plating layer has an upper surface and a side surface including a portion protruding from the solder resist layer and having a rough surface and that the top plating layer has a hemispherical shape and is covering only the upper surface of the base plating layer.
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