公开(公告)号：US09576935B2

公开(公告)日：2017-02-21

申请号：US14254214

申请日：2014-04-16

Applicant: Infineon Technologies AG

Inventor： Michael Bauer ,  Ludwig Heitzer ,  Christian Stuempfl

IPC: H01L23/48 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49548 ,  H01L25/0655 ,  H01L25/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.

Abstract translation: 一种制造半导体封装的方法包括提供具有孔径的第一衬底，提供第一半导体芯片，将第一半导体芯片连接到第一衬底，用第一绝缘材料填充孔，并用半导体芯片封装第二绝缘材料 创建第一个封装体。

公开(公告)号：US20160126227A1

公开(公告)日：2016-05-05

申请号：US14926892

申请日：2015-10-29

Applicant: Infineon Technologies AG

Inventor： Michael Bauer ,  Ludwig Heitzer ,  Christian Stuempfl

IPC: H01L25/16 ,  H01L21/78 ,  H01L21/02 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L25/16 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/78 ,  H01L23/485 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/04 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/273 ,  H01L2224/274 ,  H01L2224/291 ,  H01L2224/3201 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1461 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A method for fabricating an electronic device includes providing a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first semiconductor die and a first solder interconnect layer applied to a main face of the first semiconductor die. The second semiconductor chip has a second semiconductor die, an insulating layer applied to a main face of the second semiconductor die, and a second solder interconnect layer applied to the insulating layer. The method further includes attaching the first semiconductor chip with the first solder interconnect layer to a first carrier and attaching the second semiconductor chip with the second solder interconnect layer to a second carrier.

Abstract translation: 一种制造电子器件的方法包括提供第一半导体芯片和第二半导体芯片。 第一半导体芯片具有施加到第一半导体管芯的主面的第一半导体管芯和第一焊料互连层。 第二半导体芯片具有第二半导体管芯，施加到第二半导体管芯的主面的绝缘层和施加到绝缘层的第二焊料互连层。 该方法还包括将具有第一焊料互连层的第一半导体芯片附接到第一载体并且将第二半导体芯片与第二焊料互连层附接到第二载体。

公开(公告)号：US12158448B2

公开(公告)日：2024-12-03

申请号：US18050178

申请日：2022-10-27

Applicant: Infineon Technologies AG

Inventor： Derek Debie ,  Klaus Elian ,  Ludwig Heitzer ,  David Tumpold ,  Jens Pohl ,  Cyrus Ghahremani ,  Thorsten Meyer ,  Christian Geissler ,  Andreas Allmeier

IPC: G01N29/22 ,  G01N25/00 ,  G01N29/02 ,  G01N29/24

Abstract: A radiation source device includes at least one membrane layer, a radiation source structure to emit electromagnetic or infrared radiation, a substrate and a spacer structure, wherein the substrate and the at least one membrane form a chamber, wherein a pressure in the chamber is lower than or equal to a pressure outside of the chamber, and wherein the radiation source structure is arranged between the at least one membrane layer and the substrate.

公开(公告)号：US20150303135A1

公开(公告)日：2015-10-22

申请号：US14254214

申请日：2014-04-16

Applicant: Infineon Technologies AG

Inventor： Michael Bauer ,  Ludwig Heitzer ,  Christian Stuempfl

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49548 ,  H01L25/0655 ,  H01L25/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body.

Abstract translation: 一种制造半导体封装的方法包括提供具有孔径的第一衬底，提供第一半导体芯片，将第一半导体芯片连接到第一衬底，用第一绝缘材料填充孔，并用半导体芯片封装第二绝缘材料 创建第一个封装体。

公开(公告)号：US12283538B2

公开(公告)日：2025-04-22

申请号：US17740413

申请日：2022-05-10

Applicant: Infineon Technologies AG

Inventor： Marcus Boehm ,  Michael Fuegl ,  Ludwig Heitzer ,  Stefan Woetzel

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A molded semiconductor package includes: a mold compound; a metal substrate partly embedded in the mold compound; at least one first metal lead partly embedded in the mold compound; an inlay embedded in the mold compound, the inlay comprising a semiconductor die embedded in an electrically insulating body, a first metal structure attached to a first side of the semiconductor die, and a second metal structure attached to a second side of the semiconductor die; and a metal clip at least partly embedded in the mold compound and connecting the second metal structure to the at least one first metal lead. The semiconductor die has a maximum junction temperature higher than a glass transition temperature of the mold compound, the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die, and the metal substrate is attached to the first metal structure.

公开(公告)号：US10539779B2

公开(公告)日：2020-01-21

申请号：US15674149

申请日：2017-08-10

Applicant: Infineon Technologies AG

Inventor： Ludwig Heitzer ,  Derek Debie ,  Klaus Elian ,  Cyrus Ghahremani ,  Johannes Lodermeyer ,  Oskar Neuhoff ,  Johann Strasser

IPC: G02B26/08 ,  B81B7/00 ,  B81C3/00 ,  G02B26/10 ,  G01S7/481

Abstract: A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.

公开(公告)号：US10043768B2

公开(公告)日：2018-08-07

申请号：US14709648

申请日：2015-05-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Thorsten Meyer ,  Ludwig Heitzer

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

Abstract: A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a chip, the redistribution layer comprising a first redistribution line. The semiconductor further comprises an isolation layer disposed over the redistribution layer, the isolation layer having a first opening forming a first pad area and a first interconnect located in the first opening and in contact with the first redistribution line.

公开(公告)号：US20230369177A1

公开(公告)日：2023-11-16

申请号：US17740413

申请日：2022-05-10

Applicant: Infineon Technologies AG

Inventor： Marcus Boehm ,  Michael Fuegl ,  Ludwig Heitzer ,  Stefan Woetzel

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49506 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49568 ,  H01L21/4825 ,  H01L21/565

Abstract: A molded semiconductor package includes: a mold compound; a metal substrate partly embedded in the mold compound; at least one first metal lead partly embedded in the mold compound; an inlay embedded in the mold compound, the inlay comprising a semiconductor die embedded in an electrically insulating body, a first metal structure attached to a first side of the semiconductor die, and a second metal structure attached to a second side of the semiconductor die; and a metal clip at least partly embedded in the mold compound and connecting the second metal structure to the at least one first metal lead. The semiconductor die has a maximum junction temperature higher than a glass transition temperature of the mold compound, the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die, and the metal substrate is attached to the first metal structure.

公开(公告)号：US10571682B2

公开(公告)日：2020-02-25

申请号：US15674149

申请日：2017-08-10

Applicant: Infineon Technologies AG

Inventor： Ludwig Heitzer ,  Derek Debie ,  Klaus Elian ,  Cyrus Ghahremani ,  Johannes Lodermeyer ,  Oskar Neuhoff ,  Johann Strasser

IPC: G02B26/08 ,  B81B7/00 ,  B81C3/00 ,  G02B26/10 ,  G01S7/481

Abstract: A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.

公开(公告)号：US09881909B2

公开(公告)日：2018-01-30

申请号：US14926892

申请日：2015-10-29

Applicant: Infineon Technologies AG

Inventor： Michael Bauer ,  Ludwig Heitzer ,  Christian Stuempfl

IPC: H01L21/4763 ,  H01L25/16 ,  H01L23/485 ,  H01L21/02 ,  H01L21/78 ,  H01L25/00 ,  H01L25/04 ,  H01L23/00

CPC classification number: H01L25/16 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/78 ,  H01L23/485 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/04 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/273 ,  H01L2224/274 ,  H01L2224/291 ,  H01L2224/3201 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1461 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A method for fabricating an electronic device includes providing a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first semiconductor die and a first solder interconnect layer applied to a main face of the first semiconductor die. The second semiconductor chip has a second semiconductor die, an insulating layer applied to a main face of the second semiconductor die, and a second solder interconnect layer applied to the insulating layer. The method further includes attaching the first semiconductor chip with the first solder interconnect layer to a first carrier and attaching the second semiconductor chip with the second solder interconnect layer to a second carrier.