公开(公告)号：US20140021637A1

公开(公告)日：2014-01-23

申请号：US14037057

申请日：2013-09-25

Applicant: Infineon Technologies AG

Inventor： Walter Rieger ,  Franz Hirler ,  Martin Poelzl ,  Manfred Kotek

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate, a doped zone, a polysilicon layer and an elongate plug structure. The doped zone is within the semiconductor substrate. The polysilicon layer is disposed in a trench electrically isolated from the semiconductor substrate by an insulating layer. The elongate plug structure extends in a lateral direction in or above the semiconductor substrate. The elongate plug structure provides electrical connection between the doped zone and the polysilicon layer.

Abstract translation: 半导体器件包括半导体衬底，掺杂区，多晶硅层和细长插塞结构。 掺杂区在半导体衬底内。 多晶硅层通过绝缘层设置在与半导体衬底电隔离的沟槽中。 细长插头结构在半导体衬底中或其上方在横向方向上延伸。 细长塞结构提供掺杂区和多晶硅层之间的电连接。

公开(公告)号：US09142444B2

公开(公告)日：2015-09-22

申请号：US13895132

申请日：2013-05-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Markus Zundel ,  Erwin Bacher ,  Andreas Behrendt ,  Joerg Ortner ,  Walter Rieger ,  Rudolf Zelsacher

IPC: H01L21/8242 ,  H01L21/762 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/861

CPC classification number: H01L21/76224 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/861

Abstract: A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein the electrically conductive layer only partly fills the protective trench.

Abstract translation: 半导体部件包括在半导体主体中具有至少一个保护沟槽的半导体本体。 绝缘层至少位于保护沟槽的底部。 在保护沟槽中的绝缘层上形成具有厚度D的导电层，其中导电层仅部分地填充保护沟槽。

公开(公告)号：US09754859B2

公开(公告)日：2017-09-05

申请号：US14037057

申请日：2013-09-25

Applicant: Infineon Technologies AG

Inventor： Walter Rieger ,  Franz Hirler ,  Martin Poelzl ,  Manfred Kotek

IPC: H01L29/732 ,  H01L23/48 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L23/481 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate, a doped zone, a polysilicon layer and an elongate plug structure. The doped zone is within the semiconductor substrate. The polysilicon layer is disposed in a trench electrically isolated from the semiconductor substrate by an insulating layer. The elongate plug structure extends in a lateral direction in or above the semiconductor substrate. The elongate plug structure provides electrical connection between the doped zone and the polysilicon layer.