公开(公告)号：US20180011651A1

公开(公告)日：2018-01-11

申请号：US15207218

申请日：2016-07-11

Applicant: INTEL CORPORATION

Inventor： Rajesh M. Sankaran ,  Prashant Sethi ,  Asit K. Mallick ,  David Woodhouse ,  Rupin H. Vakharwala

IPC: G06F3/06 ,  G06F12/14

CPC classification number: G06F3/0622 ,  G06F3/0637 ,  G06F3/064 ,  G06F3/0664 ,  G06F3/0665 ,  G06F3/0673 ,  G06F12/1009 ,  G06F12/1027 ,  G06F12/1081 ,  G06F12/109 ,  G06F12/145 ,  G06F2212/1024 ,  G06F2212/1052 ,  G06F2212/151 ,  G06F2212/152 ,  G06F2212/651 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/683

Abstract: An apparatus includes an extended capability register and an input/output (I/O) memory management circuitry. The I/O memory management circuitry is to receive, from an I/O device, an address translation request referencing a guest virtual address associated with a guest virtual address space of a virtual machine. The I/O memory management circuitry may translate the guest virtual address to a guest physical address associated with a guest physical address space of the virtual machine, and, responsive to determining that a value stored by the extended capability register indicates a restrict-translation-request-response (RTRR) mode, transmit, to the I/O device, a translation response having the guest physical address.

公开(公告)号：US10048881B2

公开(公告)日：2018-08-14

申请号：US15207218

申请日：2016-07-11

Applicant: INTEL CORPORATION

Inventor： Rajesh M. Sankaran ,  Prashant Sethi ,  Asit K. Mallick ,  David Woodhouse ,  Rupin H. Vakharwala

IPC: G06F3/06 ,  G06F12/1009 ,  G06F12/1081 ,  G06F12/14

Abstract: An apparatus includes an extended capability register and an input/output (I/O) memory management circuitry. The I/O memory management circuitry is to receive, from an I/O device, an address translation request referencing a guest virtual address associated with a guest virtual address space of a virtual machine. The I/O memory management circuitry may translate the guest virtual address to a guest physical address associated with a guest physical address space of the virtual machine, and, responsive to determining that a value stored by the extended capability register indicates a restrict-translation-request-response (RTRR) mode, transmit, to the I/O device, a translation response having the guest physical address.

公开(公告)号：US09032246B2

公开(公告)日：2015-05-12

申请号：US13746194

申请日：2013-01-21

Applicant: Intel Corporation

Inventor： David Woodhouse

IPC: G06F11/00 ,  G06F11/10

CPC classification number: G06F11/1076 ,  G06F2211/1035 ,  G06F2211/1057

Abstract: Some embodiments of the invention shift the responsibility for creating parity and error correction blocks from the hardware or software RAID units or modules to the computer system's file system, allowing the file system's existing mechanisms of write atomicity to be used to help ensure consistency of the on-disk information throughout all or increasing portions of the information saving and/or updating cycle.

Abstract translation: 本发明的一些实施例将将奇偶校验块和纠错块创建的责任从硬件或软件RAID单元或模块转移到计算机系统的文件系统，允许文件系统的现有写入原子性机制用于帮助确保 遍及信息保存和/或更新周期的所有或增加的部分中的磁盘信息。