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公开(公告)号:US11120620B2
公开(公告)日:2021-09-14
申请号:US16910252
申请日:2020-06-24
Applicant: Intel Corporation
Inventor: Filip Strugar , Trapper McFerron , Adam Lake
Abstract: An apparatus to facilitate variable rate shading is disclosed. The apparatus comprises one or more processors to generate a course pixel output value for a pixel block, generate a gradient value comprising a gradient of the course pixel output value using neighbor pixel data and process the pixels in the pixel block using the gradient value to generate a fine pixel value for one or more pixels.
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公开(公告)号:US20210012563A1
公开(公告)日:2021-01-14
申请号:US16910252
申请日:2020-06-24
Applicant: Intel Corporation
Inventor: Filip Strugar , Trapper McFerron , Adam Lake
Abstract: An apparatus to facilitate variable rate shading is disclosed. The apparatus comprises one or more processors to generate a course pixel output value for a pixel block, generate a gradient value comprising a gradient of the course pixel output value using neighbor pixel data and process the pixels in the pixel block using the gradient value to generate a fine pixel value for one or more pixels.
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公开(公告)号:US20190236758A1
公开(公告)日:2019-08-01
申请号:US15883076
申请日:2018-01-29
Applicant: INTEL CORPORATION
Inventor: Sungye Kim , Seshupriya Alluru , Filip Strugar , Matthew Goyder , Yazdan Yar Khabiri , Anupreet Kalra , Kai Xiao
CPC classification number: G06T5/002 , G06T7/13 , G06T15/04 , G06T15/405 , G06T2200/12 , G06T2207/20024 , G06T2207/20036 , G06T2207/20182
Abstract: Apparatus and method for temporally stable conservative morphological anti-aliasing. For example, one embodiment of a method comprises: rendering a current frame in a graphics processing apparatus, the current frame including color components and depth components; detecting edges within the rendered frame to generate a first set of edge candidates and a second set of edge candidates; performing spatial anti-aliasing using the first set of edge candidates; and performing temporal anti-aliasing using the second set of edge candidates.
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公开(公告)号:US11354807B2
公开(公告)日:2022-06-07
申请号:US17153195
申请日:2021-01-20
Applicant: Intel Corporation
Inventor: Filip Strugar
IPC: G06T7/13
Abstract: An apparatus and method for performing multisampling anti-aliasing. For example, one embodiment of an apparatus samples multiple locations within each pixel of an image frame to generate a plurality of image slices. Each image slice comprises a different set of samples for each of the pixels of the image frame. Anti-aliasing is then performed on the image frame using the image slices by first subdividing the plurality of image slices into equal-sized pixel blocks and determining whether each pixel block has one or more different pixel values in different image slices. If so, then edge detection and simple shape detection is performed using pixel data from a pixel block in a single image slice; if not, then edge detection and simple shape detection is performed using the pixel block in multiple image slices.
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公开(公告)号:US20170287098A1
公开(公告)日:2017-10-05
申请号:US15084803
申请日:2016-03-30
Applicant: Intel Corporation
Inventor: Filip Strugar , Axel Mamode
CPC classification number: G06T1/20 , G06F12/0804 , G06F2212/1041 , G06T1/60 , G06T15/005 , G06T15/40 , G06T15/80
Abstract: Embodiment described herein combines a caching system with special cache flushing methods aimed at reducing thread divergence across a group of threads in a thread group, in order to synchronize branching paths taken by different threads executing on the same graphics processor execution unit, One embodiment provides for a graphics processing apparatus comprising graphics execution logic to execute one or more threads of a graphics shader program; an occluder cache to store input occluder node data for adaptive graphical effects logic of the graphics shader program; and compression logic to compress input occluder node data stored in the occluder cache. The occluder node data, in one embodiment, includes occlusion data for use with adaptive shadowing or transparency logic.
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公开(公告)号:US10902605B2
公开(公告)日:2021-01-26
申请号:US16015023
申请日:2018-06-21
Applicant: Intel Corporation
Inventor: Filip Strugar
IPC: G06T7/13
Abstract: An apparatus and method for performing multisampling anti-aliasing. For example, one embodiment of an apparatus samples multiple locations within each pixel of an image frame to generate a plurality of image slices. Each image slice comprises a different set of samples for each of the pixels of the image frame. Anti-aliasing is then performed on the image frame using the image slices by first subdividing the plurality of image slices into equal-sized pixel blocks and determining whether each pixel block has one or more different pixel values in different image slices. If so, then edge detection and simple shape detection is performed using pixel data from a pixel block in a single image slice; if not, then edge detection and simple shape detection is performed using the pixel block in multiple image slices.
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公开(公告)号:US09959590B2
公开(公告)日:2018-05-01
申请号:US15084803
申请日:2016-03-30
Applicant: Intel Corporation
Inventor: Filip Strugar , Axel Mamode
CPC classification number: G06T1/20 , G06F12/0804 , G06F2212/1041 , G06T1/60 , G06T15/005 , G06T15/40 , G06T15/80
Abstract: Embodiment described herein combines a caching system with special cache flushing methods aimed at reducing thread divergence across a group of threads in a thread group, in order to synchronize branching paths taken by different threads executing on the same graphics processor execution unit, One embodiment provides for a graphics processing apparatus comprising graphics execution logic to execute one or more threads of a graphics shader program; an occluder cache to store input occluder node data for adaptive graphical effects logic of the graphics shader program; and compression logic to compress input occluder node data stored in the occluder cache. The occluder node data, in one embodiment, includes occlusion data for use with adaptive shadowing or transparency logic.
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