公开(公告)号：US09814130B2

公开(公告)日：2017-11-07

申请号：US15138880

申请日：2016-04-26

Applicant: Intel Corporation

Inventor： Shaowu Huang ,  John J. Abbott

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/40 ,  H05K3/46 ,  H01R12/71 ,  H01R13/6598

CPC classification number: H05K1/024 ,  H01R12/71 ,  H01R13/6598 ,  H05K1/0234 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/10621 ,  Y10T29/49156 ,  Y10T29/49167

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one instance, a printed circuit board (PCB) assembly may comprise a substrate and an interconnect (such as a via) formed in the substrate to route an electrical signal within the PCB. The interconnect may include a stub formed on the interconnect. At least a portion of the stub may be covered with an absorbing material to at least partially absorb a portion of the electric signal that is reflected by the stub. The absorbing material may be selected such that its dielectric loss tangent is greater than one, for a frequency range of a frequency of the reflected portion of the electric signal. A dielectric constant of the absorbing material may be inversely proportionate to the frequency of the reflected electric signal. Other embodiments may be described and/or claimed.

公开(公告)号：US09806392B2

公开(公告)日：2017-10-31

申请号：US14716101

申请日：2015-05-19

Applicant: Intel Corporation

Inventor： Shaowu Huang ,  Hanqiao Zhang ,  Kai Xiao ,  Beom-Taek Lee ,  John J. Abbott ,  Gary Charles

IPC: H01P3/08 ,  H04B3/32 ,  H05K1/02 ,  H05K9/00

CPC classification number: H01P3/081 ,  H04B3/32 ,  H05K1/02 ,  H05K1/0219 ,  H05K1/0233 ,  H05K3/3452 ,  H05K9/0022 ,  H05K2201/083

Abstract: Apparatuses and methods associated with shield lines, and/or complementary decoupling capacitors and/or electromagnetic absorbing materials are disclosed herein. In embodiments, an apparatus may include a substrate having a ground plane; and a first and a second transmission line disposed on the substrate. Further, the apparatus may include a shield line constituted with electromagnetic absorbing material disposed between the first and second transmission lines and not coupled with the ground plane. In embodiments, the substrate may further include a power plane having a plurality of edges and a plurality of spacing; a plurality of decoupling capacitors disposed on the power or ground plane; and electromagnetic absorbing materials adhered to the plurality of edges and disposed in the plurality of spacing. Other embodiments may be described and/or claimed.

公开(公告)号：US20160344085A1

公开(公告)日：2016-11-24

申请号：US14716101

申请日：2015-05-19

Applicant: Intel Corporation

Inventor： Shaowu Huang ,  Hanqiao Zhang ,  Kai Xiao ,  Beom-Taek Lee ,  John J. Abbott ,  Gary Charles

IPC: H01P3/08 ,  H05K9/00 ,  H04B3/32 ,  H01P11/00

CPC classification number: H01P3/081 ,  H04B3/32 ,  H05K1/02 ,  H05K1/0219 ,  H05K1/0233 ,  H05K3/3452 ,  H05K9/0022 ,  H05K2201/083

Abstract: Apparatuses and methods associated with shield lines, and/or complementary decoupling capacitors and/or electromagnetic absorbing materials are disclosed herein. In embodiments, an apparatus may include a substrate having a ground plane; and a first and a second transmission line disposed on the substrate. Further, the apparatus may include a shield line constituted with electromagnetic absorbing material disposed between the first and second transmission lines and not coupled with the ground plane. In embodiments, the substrate may further include a power plane having a plurality of edges and a plurality of spacing; a plurality of decoupling capacitors disposed on the power or ground plane; and electromagnetic absorbing materials adhered to the plurality of edges and disposed in the plurality of spacing. Other embodiments may be described and/or claimed.

Abstract translation: 本文公开了与屏蔽线和/或互补去耦电容器和/或电磁吸收材料相关联的装置和方法。 在实施例中，装置可以包括具有接地平面的基板; 以及设置在基板上的第一和第二传输线。 此外，该装置可以包括由设置在第一和第二传输线之间并且不与接地平面耦合的电磁吸收材料构成的屏蔽线。 在实施例中，基板还可以包括具有多个边缘和多个间隔的电力平面; 设置在电源或接地平面上的多个去耦电容器; 和电磁吸收材料粘附到多个边缘并以多个间隔设置。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20160242273A1

公开(公告)日：2016-08-18

申请号：US15138880

申请日：2016-04-26

Applicant: Intel Corporation

Inventor： Shaowu Huang ,  John J. Abbott

IPC: H05K1/02 ,  H05K3/40 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K1/024 ,  H01R12/71 ,  H01R13/6598 ,  H05K1/0234 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/10621 ,  Y10T29/49156 ,  Y10T29/49167

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one instance, a printed circuit board (PCB) assembly may comprise a substrate and an interconnect (such as a via) formed in the substrate to route an electrical signal within the PCB. The interconnect may include a stub formed on the interconnect. At least a portion of the stub may be covered with an absorbing material to at least partially absorb a portion of the electric signal that is reflected by the stub. The absorbing material may be selected such that its dielectric loss tangent is greater than one, for a frequency range of a frequency of the reflected portion of the electric signal. A dielectric constant of the absorbing material may be inversely proportionate to the frequency of the reflected electric signal. Other embodiments may be described and/or claimed.

公开(公告)号：US09351394B2

公开(公告)日：2016-05-24

申请号：US14303396

申请日：2014-06-12

Applicant: INTEL CORPORATION

Inventor： Shaowu Huang ,  John J. Abbott

IPC: H05K1/11 ,  H05K1/02 ,  H01R12/71 ,  H01R13/6598

CPC classification number: H05K1/024 ,  H01R12/71 ,  H01R13/6598 ,  H05K1/0234 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/10621 ,  Y10T29/49156 ,  Y10T29/49167

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one instance, a printed circuit board (PCB) assembly may comprise a substrate and an interconnect (such as a via) formed in the substrate to route an electrical signal within the PCB. The interconnect may include a stub formed on the interconnect. At least a portion of the stub may be covered with an absorbing material to at least partially absorb a portion of the electric signal that is reflected by the stub. The absorbing material may be selected such that its dielectric loss tangent is greater than one, for a frequency range of a frequency of the reflected portion of the electric signal. A dielectric constant of the absorbing material may be inversely proportionate to the frequency of the reflected electric signal. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例涉及用于互连短截线中的电信号吸收的技术和配置。 在一种情况下，印刷电路板（PCB）组件可以包括衬底和形成在衬底中以在PCB内布置电信号的互连（例如通孔）。 互连可以包括形成在互连上的短截线。 短截线的至少一部分可以用吸收材料覆盖以至少部分地吸收被短截线反射的电信号的一部分。 对于电信号的反射部分的频率的频率范围，可以选择吸收材料使得其介电损耗角正切大于1。 吸收材料的介电常数可以与反射电信号的频率成反比。 可以描述和/或要求保护其他实施例。