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    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’)
    1.
    发明授权
    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’) 有权

    公开(公告)号：US10810155B2

    公开(公告)日：2020-10-20

    申请号：US16539734

    申请日：2019-08-13

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Michael E. Aho ,  John E. Attinella ,  Thomas M. Gooding ,  Michael B. Mundy

    IPC: G06F15/177 ,  G06F9/4401 ,  G06F8/61

    Abstract: Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’), the parallel computer comprising a plurality of compute nodes coupled for data communications via one or more data communications networks, including: initiating, by a source compute node of the parallel computer, an RDMA broadcast operation to broadcast binary configuration information to one or more target compute nodes in the parallel computer; preparing, by each target compute node, the target compute node for receipt of the binary configuration information from the source compute node; transmitting, by each target compute node, a ready message to the target compute node, the ready message indicating that the target compute node is ready to receive the binary configuration information from the source compute node; and performing, by the source compute node, an RDMA broadcast operation to write the binary configuration information into memory of each target compute node.

    Prefetch list management in a computer system
    4.
    发明授权
    Prefetch list management in a computer system 有权

    公开(公告)号：US09626296B2

    公开(公告)日：2017-04-18

    申请号：US14336183

    申请日：2014-07-21

    Applicant: International Business Machines Corporation

    Inventor： Thomas M. Gooding

    IPC: G06F12/08 ,  G06F12/0862 ,  G06F9/38

    CPC classification number: G06F12/0862 ,  G06F9/3816 ,  G06F11/00 ,  G06F2212/1016 ,  G06F2212/1021 ,  G06F2212/602 ,  G06F2212/6024

    Abstract: Method and apparatus for tracking a prefetch list of a list prefetcher associated with a computer program in the event the list prefetcher cannot track the computer program. During a first execution of a computer program, the computer program outputs checkpoint indications. Also during the first execution of the computer program, a list prefetcher builds a prefetch list for subsequent executions of the computer program. As the computer program executes for the first time, the list prefetcher associates each checkpoint indication with a location in the building prefetch list. Upon subsequent executions of the computer program, if the list prefetcher cannot track the prefetch list to the computer program, the list prefetcher waits until the computer program outputs the next checkpoint indication. The list prefetcher is then able to jump to the location of the prefetch list associated with the checkpoint indication.

    Synchronizing compute node time bases in a parallel computer
    5.
    发明授权
    Synchronizing compute node time bases in a parallel computer 有权
    在并行计算机中同步计算节点时基

    公开(公告)号：US08943350B2

    公开(公告)日：2015-01-27

    申请号：US13693894

    申请日：2012-12-04

    Applicant: International Business Machines Corporation

    Inventor： Dong Chen ,  Daniel A. Faraj ,  Thomas M. Gooding ,  Philip Heidelberger

    IPC: G06F1/12

    CPC classification number: G06F1/12 ,  H04L12/413

    Abstract: Synchronizing time bases in a parallel computer that includes compute nodes organized for data communications in a tree network, where one compute node is designated as a root, and, for each compute node: calculating data transmission latency from the root to the compute node; configuring a thread as a pulse waiter; initializing a wakeup unit; and performing a local barrier operation; upon each node completing the local barrier operation, entering, by all compute nodes, a global barrier operation; upon all nodes entering the global barrier operation, sending, to all the compute nodes, a pulse signal; and for each compute node upon receiving the pulse signal: waking, by the wakeup unit, the pulse waiter; setting a time base for the compute node equal to the data transmission latency between the root node and the compute node; and exiting the global barrier operation.

    Abstract translation: 在并行计算机中同步时基，其包括为树网络中的数据通信而组织的计算节点，其中一个计算节点被指定为根，并且对于每个计算节点，计算从根到计算节点的数据传输等待时间; 将线程配置为脉冲服务员; 初始化唤醒单元; 并执行局部屏障操作; 在每个节点完成局部屏障操作时，由所有计算节点进入全局屏障操作; 在所有节点进入全局屏障操作之后，向所有计算节点发送脉冲信号; 并且对于每个计算节点在接收到脉冲信号时：由唤醒单元唤醒脉冲服务员; 为计算节点设置等于根节点和计算节点之间的数据传输延迟的时基; 并退出全球屏障操作。

    SPECULATIVE THREAD EXECUTION AND ASYNCHRONOUS CONFLICT EVENTS
    6.
    发明申请
    SPECULATIVE THREAD EXECUTION AND ASYNCHRONOUS CONFLICT EVENTS 有权
    协调螺旋执行和异常冲突事件

    公开(公告)号：US20130218844A1

    公开(公告)日：2013-08-22

    申请号：US13827981

    申请日：2013-03-14

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Thomas M. Gooding ,  John K. O'Brien ,  Kai-Ting Amy Wang ,  Xiaotong Zhuang

    IPC: G06F11/14

    CPC classification number: G06F11/1469 ,  G06F9/3834 ,  G06F9/3842 ,  G06F9/3851 ,  G06F9/3861 ,  G06F9/467

    Abstract: In an embodiment, asynchronous conflict events are received during a previous rollback period. Each of the asynchronous conflict events represent conflicts encountered by speculative execution of a first plurality of work units and may be received out-of-order. During a current rollback period, a first work unit is determined whose speculative execution raised one of the asynchronous conflict events, and the first work unit is older than all other of the first plurality of work units. A second plurality of work units are determined, whose ages are equal to or older than the first work unit, wherein each of the second plurality of work units are assigned to respective executing threads. Rollbacks of the second plurality of work units are performed. After the rollbacks of the second plurality of work units are performed, speculative executions of the second plurality of work units are initiated in age order, from oldest to youngest.

    Abstract translation: 在一个实施例中，在先前的回滚期间期间接收到异步冲突事件。 每个异步冲突事件表示由第一多个工作单元的推测性执行而遇到的冲突，并且可以被无序地接收。 在当前回滚期间，确定第一工作单元，其推测执行引起异步冲突事件中的一个，并且第一工作单元比第一多个工作单元中的所有其他工作单元老。 确定第二多个作业单元，其年龄等于或小于第一工作单元，其中第二多个作业单元中的每一个分配给相应的执行螺纹。 执行第二多个工作单元的回滚。 在执行第二多个作业单元的回滚之后，第二个多个作业单元的推测性执行以年龄从最早到最小的顺序发起。

    SPECULATIVE THREAD EXECUTION WITH HARDWARE TRANSACTIONAL MEMORY
    7.
    发明申请
    SPECULATIVE THREAD EXECUTION WITH HARDWARE TRANSACTIONAL MEMORY 有权
    具有硬件交互式存储器的线性螺纹执行

    公开(公告)号：US20130198749A1

    公开(公告)日：2013-08-01

    申请号：US13801943

    申请日：2013-03-13

    Applicant: International Business Machines Corporation

    Inventor： Mark E. Giampapa ,  Thomas M. Gooding ,  Raul E. Silvera ,  Kai-Ting Amy Wang ,  Peng Wu ,  Xiaotong Zhuang

    IPC: G06F9/46

    CPC classification number: G06F9/466 ,  G06F9/3842 ,  G06F9/467 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/5016 ,  G06F9/52 ,  G06F12/0862

    Abstract: In an embodiment, if a self thread has more than one conflict, a transaction of the self thread is aborted and restarted. If the self thread has only one conflict and an enemy thread of the self thread has more than one conflict, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread and the enemy thread only conflicts with the self thread and the self thread has a key that has a higher priority than a key of the enemy thread, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread, the enemy thread only conflicts with the self thread, and the self thread has a key that has a lower priority than the key of the enemy thread, the transaction of the self thread is aborted.

    Abstract translation: 在一个实施例中，如果自线程具有多于一个冲突，则自线程的事务被中止并重新启动。 如果自线程只有一个冲突，并且自线程的敌方线程有多个冲突，则自线程的事务被提交。 如果自线程只与敌方线程冲突，敌方线程只与自线程冲突，自线程的密钥优先级高于敌方线程的密钥，则自线程的事务被提交。 如果自线程只与敌方线程相冲突，敌方线程只会与自身线程冲突，自线程的密钥优先级低于敌方线程的密钥，自身线程的事务中止。

    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’)
    8.
    发明授权
    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’) 有权

    公开(公告)号：US10831701B2

    公开(公告)日：2020-11-10

    申请号：US16562740

    申请日：2019-09-06

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Michael E. Aho ,  John E. Attinella ,  Thomas M. Gooding ,  Michael B. Mundy

    IPC: G06F15/177 ,  G06F9/4401 ,  G06F8/61

    Abstract: Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’), the parallel computer comprising a plurality of compute nodes coupled for data communications via one or more data communications networks, including: initiating, by a source compute node of the parallel computer, an RDMA broadcast operation to broadcast binary configuration information to one or more target compute nodes in the parallel computer; preparing, by each target compute node, the target compute node for receipt of the binary configuration information from the source compute node; transmitting, by each target compute node, a ready message to the target compute node, the ready message indicating that the target compute node is ready to receive the binary configuration information from the source compute node; and performing, by the source compute node, an RDMA broadcast operation to write the binary configuration information into memory of each target compute node.

    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’)
    9.
    发明授权
    Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’) 有权

    公开(公告)号：US10474626B2

    公开(公告)日：2019-11-12

    申请号：US13709567

    申请日：2012-12-10

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Michael E. Aho ,  John E. Attinella ,  Thomas M. Gooding ,  Michael B. Mundy

    IPC: G06F15/16 ,  G06F15/177 ,  G06F9/4401 ,  G06F8/61

    Abstract: Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’), the parallel computer comprising a plurality of compute nodes coupled for data communications via one or more data communications networks, including: initiating, by a source compute node of the parallel computer, an RDMA broadcast operation to broadcast binary configuration information to one or more target compute nodes in the parallel computer; preparing, by each target compute node, the target compute node for receipt of the binary configuration information from the source compute node; transmitting, by each target compute node, a ready message to the target compute node, the ready message indicating that the target compute node is ready to receive the binary configuration information from the source compute node; and performing, by the source compute node, an RDMA broadcast operation to write the binary configuration information into memory of each target compute node.

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