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公开(公告)号:US20240143986A1
公开(公告)日:2024-05-02
申请号:US18216008
申请日:2023-06-29
Applicant: Imagination Technologies Limited
Inventor: Aria Ahmadi , Cagatay Dikici , Clement Charnay , Jason Rogers
IPC: G06N3/063 , G06N3/0464
CPC classification number: G06N3/063 , G06N3/0464
Abstract: Methods of dividing a neural network into chunks of operations executable in a hardware pass of hardware to execute a neural network. The layers of the neural network are divisible into layer groups that comprise a sequence of layers executable in the same hardware pass of the hardware. Each layer group is divisible into chunks of operations executable in a hardware pass of the hardware. The chunks for a layer group are defined by split parameters. A layer group loss function is obtained that represents a performance metric associated with executing a layer group on the hardware as a function of the split parameters and neural network architecture parameters for the layer group. A neural network loss function is generated based on the layer group loss function that represents the performance metric associated with executing the neural network on the hardware; and the split parameters for the one or more layer groups are selected that minimize the neural network loss function under constraints imposed by the hardware.
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公开(公告)号:US20220253506A1
公开(公告)日:2022-08-11
申请号:US17583411
申请日:2022-01-25
Applicant: Imagination Technologies Limited
Inventor: Aria Ahmadi , Cagatay Dikici , Clement Charnay
Abstract: A method and data processing system implement dilated convolution operations in hardware. Embodiments provide various ways to implement a dilated convolution based on a number of constituent convolutions, by either splitting the kernel to construct a set of constituent convolutions with smaller kernels, or dividing the input data into multiple parts and applying a convolution to each part separately. The constituent convolutions are evaluated in hardware and their results are combined to produce the result of the dilated convolution.
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