公开(公告)号：US20210050434A1

公开(公告)日：2021-02-18

申请号：US17085426

申请日：2020-10-30

Applicant: Infineon Technologies AG

Inventor： Gerhard Prechtl ,  Andreas Peter Meiser ,  Thomas Ostermann

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/10 ,  H01L27/082

Abstract: An integrated circuit includes a semiconductor substrate, first and second doping regions in the substrate, a first insulating layer on a first surface of the semiconductor substrate, the first insulating layer having first and second openings above the first and second doping regions, a polysilicon layer on the first insulating layer, the polysilicon layer having first and second openings above the first and second openings of the first insulating layer, a second insulating layer on the polysilicon layer and having first and second openings above the first and second openings of the polysilicon layer, a first contact element disposed in the first openings, a second contact element disposed in the second openings, the first and second contact elements being in contact with the first and second doping regions.

公开(公告)号：US20140210052A1

公开(公告)日：2014-07-31

申请号：US14243332

申请日：2014-04-02

Applicant: Infineon Technologies AG

Inventor： Gerhard Prechtl ,  Andreas Peter Meiser ,  Thomas Ostermann

IPC: H01L29/735 ,  H01L29/66 ,  H01L27/082

CPC classification number: H01L29/735 ,  H01L27/082 ,  H01L29/1008 ,  H01L29/6625

Abstract: According to an embodiment, a method for manufacturing a semiconductor device is provided. The method includes providing a mask layer which is used as an implantation mask when forming a doping region and which is used as an etching mask when forming an opening and a contact element formed in the opening. The contact element is in contact with the doping region.

Abstract translation: 根据实施例，提供一种用于制造半导体器件的方法。 该方法包括提供掩膜层，其在形成掺杂区域时用作注入掩模，并且当形成开口时形成开口和接触元件时用作蚀刻掩模。 接触元件与掺杂区域接触。