公开(公告)号：US20180211917A1

公开(公告)日：2018-07-26

申请号：US15877749

申请日：2018-01-23

Applicant: Infineon Technologies AG

Inventor： Juergen Hoegerl ,  Andre Arens ,  Holger Torwesten

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/29 ,  H01L23/373 ,  H01L23/498 ,  H01L23/34 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/34 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49589 ,  H01L23/49861 ,  H01L23/50 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14251 ,  H01L2924/14252 ,  H01L2924/1426 ,  H01L2924/19105 ,  H01L2224/45099

Abstract: A semiconductor module is disclosed. In one example, the module includes a carrier, at least one semiconductor transistor disposed on the carrier, at least one semiconductor diode disposed on the carrier, at least one semiconductor driver chip disposed on the carrier, a plurality of external connectors, and an encapsulation layer covering the carrier, the semiconductor transistor, the semiconductor diode, and the semiconductor driver chip. The semiconductor transistor, the semiconductor diode, and the semiconductor driver chip are arranged laterally side by side on the carrier.

公开(公告)号：US20150228616A1

公开(公告)日：2015-08-13

申请号：US14176621

申请日：2014-02-10

Applicant: Infineon Technologies AG

Inventor： Petteri Palm ,  Alexander Heinrich ,  Holger Torwesten ,  Tobias Simbeck

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/495

CPC classification number: H01L24/83 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/562 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/06181 ,  H01L2224/24246 ,  H01L2224/27831 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29147 ,  H01L2224/2918 ,  H01L2224/2926 ,  H01L2224/29393 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83801 ,  H01L2224/8382 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83931 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20644 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2224/19 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01006 ,  H01L2924/01023

Abstract: A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules.

Abstract translation: 一种制造半导体模块的方法包括提供一种金属复合基板，该金属复合基板包括金属箔，该金属箔附着在金属层上，该金属箔比该金属层薄且包含与该金属层不同的材料，并将多个半导体管芯的第一表面附接到 在构造金属箔之前，将金属箔封装在金属箔上，并将其封装在电绝缘材料中。 金属层和金属箔在半导体管芯被电绝缘材料封装之后构成，使得电绝缘材料的表面区域不含金属箔和金属层。 电绝缘材料沿着没有金属箔和金属层的表面区域分开以形成单独的模块。

公开(公告)号：US10964642B2

公开(公告)日：2021-03-30

申请号：US15877749

申请日：2018-01-23

Applicant: Infineon Technologies AG

Inventor： Juergen Hoegerl ,  Andre Arens ,  Holger Torwesten

IPC: H01L23/29 ,  H01L23/34 ,  H01L23/498 ,  H01L23/373 ,  H01L25/16 ,  H01L23/48 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/433 ,  H01L23/495 ,  H01L23/50

Abstract: A semiconductor module is disclosed. In one example, the module includes a carrier, at least one semiconductor transistor disposed on the carrier, at least one semiconductor diode disposed on the carrier, at least one semiconductor driver chip disposed on the carrier, a plurality of external connectors, and an encapsulation layer covering the carrier, the semiconductor transistor, the semiconductor diode, and the semiconductor driver chip. The semiconductor transistor, the semiconductor diode, and the semiconductor driver chip are arranged laterally side by side on the carrier.

公开(公告)号：US10192849B2

公开(公告)日：2019-01-29

申请号：US14176621

申请日：2014-02-10

Applicant: Infineon Technologies AG

Inventor： Petteri Palm ,  Alexander Heinrich ,  Holger Torwesten ,  Tobias Simbeck

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules.