公开(公告)号：US20150267304A1

公开(公告)日：2015-09-24

申请号：US14735209

申请日：2015-06-10

Applicant: Infineon Technologies AG

Inventor： Karl PILCH ,  Sonja MURINGER

IPC: C23F1/08 ,  B05C11/00 ,  C23F1/14

CPC classification number: C23F1/08 ,  B05C5/00 ,  B05C11/00 ,  B05D1/00 ,  B05D1/002 ,  C23F1/14 ,  H01L21/30604 ,  H01L21/6708 ,  H01L22/12 ,  H01L22/20

Abstract: A method for etching a workpiece may be provided, which may include: determining a plurality of reference etch profiles for a plurality of positions of an etchant dispenser, each reference etch profile corresponding to a respective position of the plurality of positions of the etchant dispenser; determining a thickness profile of the workpiece; determining a respective etch duration for each position of the plurality of positions of the etchant dispenser based on the determined thickness profile and the plurality of reference etch profiles, to reduce a total thickness variation of the workpiece; and dispensing an etchant over the workpiece via the etchant dispenser for the determined respective etch duration for each position of the plurality of positions.

Abstract translation: 可以提供用于蚀刻工件的方法，其可以包括：确定蚀刻剂分配器的多个位置的多个参考蚀刻轮廓，每个参考蚀刻轮廓对应于蚀刻剂分配器的多个位置的相应位置; 确定工件的厚度轮廓; 基于所确定的厚度轮廓和多个参考蚀刻轮廓来确定蚀刻剂分配器的多个位置中的每个位置的相应蚀刻持续时间，以减少工件的总厚度变化; 以及通过所述蚀刻剂分配器在所述工件上分配蚀刻剂，以确定所述多个位置中的每个位置的相应蚀刻持续时间。

公开(公告)号：US20180061695A1

公开(公告)日：2018-03-01

申请号：US15690316

申请日：2017-08-30

Applicant: Infineon Technologies AG

Inventor： Karl PILCH

IPC: H01L21/683 ,  H01L21/268 ,  H01L23/544 ,  H01L21/68

CPC classification number: H01L21/6835 ,  H01L21/268 ,  H01L21/302 ,  H01L21/681 ,  H01L21/7806 ,  H01L23/544 ,  H01L2221/68381 ,  H01L2223/54426

Abstract: According to various embodiments, a method for processing a wafer may include scanning a focused laser beam over the wafer to form a defect structure within the wafer, the defect structure defining a first region of the wafer located at a first side of the defect structure and a second region of the wafer located at a second side of the defect structure opposite the first side, and an edge region laterally surrounding the defect structure and extending from a first surface of the wafer to a second surface of the wafer opposite the first surface. A surface area of the first region is greater than a surface area of the edge region, and the second region is connected to the first region by the edge region. The method may further include, separating the first region and the second region from each other along the defect structure, with the first region remaining in one piece.