Abstract:
An optical receiver may receive a data stream, and may decode the data stream using a first iterative forward error correction (FEC) decoder. The optical receiver may determine whether to further decode the data stream using the first iterative FEC decoder or a second iterative FEC decoder that is different from the first iterative FEC decoder. The optical receiver may selectively perform a first action or a section action based on determining whether to further decode the data stream. The first action may include providing the data stream to the first iterative FEC decoder or the second iterative FEC decoder for further decoding when the data stream is to be further decoded. The second action may include preventing the data stream from being provided to the first iterative FEC decoder or the second iterative FEC decoder when the data stream is not to be further decoded.
Abstract:
A low-density parity-check (LDPC) decoder may receive LDPC coded data. The LDPC decoder may perform a decoding iteration associated with decoding the LDPC coded data. The decoding iteration may be performed by processing a group of layers. Each layer may include a corresponding set of check node elements, and may be processed by causing each check node element, of the set of check node elements corresponding to the layer, to update a set of variable node elements, connected to the check node element and associated with the LDPC coded data, based on a check node function associated with the check node element. The decoding iteration may be performed such that each layer is processed in parallel, and such that each check node element updates the corresponding set of variable node elements in parallel. The LDPC decoder may provide a result of performing the decoding iteration.
Abstract:
A low-density parity-check (LDPC) decoder may comprise a shift register configured to receive LDPC coded data, perform an iteration associated with decoding the LDPC coded data, and provide a result of performing the iteration. The shift register may include a quantity of lanes corresponding to a quantity of data words received by the shift register at a particular clock cycle, a quantity of stages corresponding to a quantity of clock cycles needed to perform the iteration, a quantity of storage elements, associated with storing the data words during the iteration, and a set of check node elements associated with updating the data words during the iteration. The quantity of stages times the quantity of lanes may be greater than the quantity of storage elements by a particular number of storage elements. The particular number of storage elements may be displaced by the set of check node elements.
Abstract:
An optical receiver may receive input signals carried by respective sub-carriers. The optical receiver may determine, based on the input signals, a compensation value to be used to modify an input signal. The optical receiver may use the compensation value to adjust the input signal to form a modified input signal. The compensation value may be used to modify a frequency or a phase of the input signal. The optical receiver may determine, based on the modified input signal, a phase estimate value that represents an estimated phase associated with the input signal. The optical receiver may combine the compensation value and the phase estimate value to form a phase adjustment signal, may combine the input signal and the phase adjustment signal to form an output signal, and may output the output signal.