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公开(公告)号:US12112719B2
公开(公告)日:2024-10-08
申请号:US18167902
申请日:2023-02-13
Applicant: Innolux Corporation
Inventor: Yi-Hung Lin , Cheng-Hung Tsai
IPC: G09G5/00
CPC classification number: G09G5/006 , G09G2300/0408 , G09G2310/0202 , G09G2310/0243 , G09G2310/0264
Abstract: An electronic device with short frame time length is provided. The electronic device includes a substrate, a plurality of first signal lines, a plurality of second signal lines, and two first integrated circuits. The plurality of first signal lines are disposed on the substrate. The plurality of first signal lines are divided into a first group of signal lines and a second group of signal lines. The plurality of second signal lines are disposed on the substrate. The plurality of second signal lines are disposed alternately with the plurality of first signal lines. The two first integrated circuits are bonded on the substrate. Each of the two first integrated circuits are electrically connected to the first group of signal lines and the second group of signal lines. The first group of signal lines and the second group of signal lines are disposed alternately in columns.
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公开(公告)号:US20230282179A1
公开(公告)日:2023-09-07
申请号:US18167902
申请日:2023-02-13
Applicant: Innolux Corporation
Inventor: Yi-Hung Lin , Cheng-Hung Tsai
IPC: G09G5/00
CPC classification number: G09G5/006 , G09G2310/0264 , G09G2300/0408 , G09G2310/0243 , G09G2310/0202
Abstract: An electronic device with short frame time length is provided. The electronic device includes a substrate, a plurality of first signal lines, a plurality of second signal lines, and two first integrated circuits. The plurality of first signal lines are disposed on the substrate. The plurality of first signal lines are divided into a first group of signal lines and a second group of signal lines. The plurality of second signal lines are disposed on the substrate. The plurality of second signal lines are disposed alternately with the plurality of first signal lines. The two first integrated circuits are bonded on the substrate. Each of the two first integrated circuits are electrically connected to the first group of signal lines and the second group of signal lines. The first group of signal lines and the second group of signal lines are disposed alternately in columns.
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