公开(公告)号：US11029205B2

公开(公告)日：2021-06-08

申请号：US16513457

申请日：2019-07-16

Applicant: Intel Corporation

Inventor： Sungbong Park ,  Ansheng Liu

IPC: G01J1/46 ,  H01L27/06 ,  H01L49/02 ,  G01J1/44

Abstract: Embodiments described herein relate to techniques and configurations associated with a photonic apparatus (e.g., PIC) having a photodiode and a bypass capacitor disposed in a channel. In one instance, the apparatus includes a substrate in which at least first and second channels are formed. The first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode. The first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by the power supply associated with the apparatus. Additional embodiments can be described and claimed.

公开(公告)号：US11251228B2

公开(公告)日：2022-02-15

申请号：US16225130

申请日：2018-12-19

Applicant: Intel Corporation

Inventor： Boping Xie ,  Ansheng Liu ,  Olufemi Isiade Dosunmu ,  Alexander Krichevsky ,  Kelly Christopher Magruder ,  Harel Frish

IPC: H01L27/30 ,  G02B6/42 ,  H05K1/02 ,  G02B27/09 ,  G02B7/04

Abstract: Optical receiver packages and device assemblies that include photodetector (PD) chips having focus lenses monolithically integrated on PD die backsides are disclosed. An example receiver package includes a support structure, a PD die, and an optical input device. The PD die includes a PD, integrated proximate to a first face of the PD die, and further includes a lens, integrated on, or proximate to, an opposite second face. The first face of the PD die faces the support structure, while the second face (“backside”) faces the optical input device. The optical receiver architectures described herein may provide an improvement for the optical alignment tolerance issues, especially for high-speed operation in which the active aperture of the PD may have to be very small. Furthermore, architectures described herein advantageously enable integrating a focus lens in a PD die that may be coupled to the support structure in a flip-chip arrangement.

公开(公告)号：US20220019098A1

公开(公告)日：2022-01-20

申请号：US17131470

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Mengyuan Huang ,  David Patel ,  Kejia Li ,  Wei Qian ,  Ansheng Liu

IPC: G02F1/025

Abstract: An optical modulator includes a substrate, a first dielectric layer over the substrate, a rib waveguide including a PN junction on the first dielectric, a second dielectric layer over the rib waveguide and a stressor layer including a metal, where the first or the second dielectric is between the stressor layer and the PN junction.

公开(公告)号：US20190123109A1

公开(公告)日：2019-04-25

申请号：US16225130

申请日：2018-12-19

Applicant: Intel Corporation

Inventor： Boping Xie ,  Ansheng Liu ,  Olufemi Isiade Dosunmu ,  Alexander Krichevsky ,  Kelly Christopher Magruder ,  Harel Frish

IPC: H01L27/30 ,  G02B6/42 ,  G02B27/09 ,  G02B7/04 ,  H05K1/02

Abstract: Optical receiver packages and device assemblies that include photodetector (PD) chips having focus lenses monolithically integrated on PD die backsides are disclosed. An example receiver package includes a support structure, a PD die, and an optical input device. The PD die includes a PD, integrated proximate to a first face of the PD die, and further includes a lens, integrated on, or proximate to, an opposite second face. The first face of the PD die faces the support structure, while the second face (“backside”) faces the optical input device. The optical receiver architectures described herein may provide an improvement for the optical alignment tolerance issues, especially for high-speed operation in which the active aperture of the PD may have to be very small. Furthermore, architectures described herein advantageously enable integrating a focus lens in a PD die that may be coupled to the support structure in a flip-chip arrangement.

公开(公告)号：US20180231728A1

公开(公告)日：2018-08-16

申请号：US15868152

申请日：2018-01-11

Applicant: Intel Corporation

Inventor： Donald Faw ,  Zining Huang ,  Ansheng Liu

IPC: G02B6/42 ,  G02B6/38

CPC classification number: G02B6/4293 ,  G02B6/3875 ,  G02B6/3885 ,  G02B6/4206 ,  G02B6/4214 ,  G02B6/4246 ,  G02B6/4284 ,  G02B6/43 ,  H01R12/716

Abstract: A single hybrid electrical/optical connector simultaneously forms both electrical and optical input/output connections by a single step engagement between elements on a connector and corresponding elements of the opposite gender on a mating connector. The connector can be surface-mounted on a circuit board, and a mating connector can be vertically pluggable onto the connector. The optical elements on the connector and/or the mating connector can be detachable, which can simplify assembly of a system that includes the circuit board. The hybrid electrical/optical connector has applications for optical transceivers. The hybrid electrical/optical connector includes a housing that extends laterally along a housing plane. The housing includes electrical and optical sockets thereon. In some examples, the electrical sockets and the optical sockets are laterally arranged on opposite sides of a division plane perpendicular to the housing plane.

公开(公告)号：US09880367B2

公开(公告)日：2018-01-30

申请号：US15024920

申请日：2013-12-19

Applicant: Intel Corporation

Inventor： Donald Faw ,  Zining Huang ,  Ansheng Liu

IPC: G02B6/36 ,  G02B6/42 ,  H01R12/71 ,  G02B6/38 ,  G02B6/43

CPC classification number: G02B6/4293 ,  G02B6/3875 ,  G02B6/3885 ,  G02B6/4206 ,  G02B6/4214 ,  G02B6/4246 ,  G02B6/4284 ,  G02B6/43 ,  H01R12/716

Abstract: A single hybrid electrical/optical connector simultaneously forms both electrical and optical input/output connections by a single step engagement between elements on a connector and corresponding elements of the opposite gender on a mating connector. The connector can be surface-mounted on a circuit board, and a mating connector can be vertically pluggable onto the connector. The optical elements on the connector and/or the mating connector can be detachable, which can simplify assembly of a system that includes the circuit board. The hybrid electrical/optical connector has applications for optical transceivers. The hybrid electrical/optical connector includes a housing that extends laterally along a housing plane. The housing includes electrical and optical sockets thereon. In some examples, the electrical sockets and the optical sockets are laterally arranged on opposite sides of a division plane perpendicular to the housing plane.

公开(公告)号：US08803268B2

公开(公告)日：2014-08-12

申请号：US13871083

申请日：2013-04-26

Applicant: Intel Corporation

Inventor： John Heck ,  Ansheng Liu ,  Michael T. Morse ,  Haisheng Rong

IPC: H01L27/14

CPC classification number: H01L31/02327 ,  G02B6/4214

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract translation: 垂直全内反射（TIR）镜及其制造是通过使用晶体硅蚀刻创建入门轮廓而制成的。 从SOI晶片开始，使用深硅蚀刻来暴露掩埋氧化物层，然后将其湿法蚀刻（在HF中），打开Si器件层的底表面。 然后将该底部硅表面暴露，使得在晶体刻蚀中，所得到的形状是具有刻面的重入梯形。这些刻面可以与平面硅波导结合使用以基于TIR原理向上反射光。 或者，光可以从晶片上方耦合到硅波导中，用于诸如晶片级测试的目的。

公开(公告)号：US20240388067A1

公开(公告)日：2024-11-21

申请号：US18787825

申请日：2024-07-29

Applicant: Intel Corporation

Inventor： Jin Hong ,  Ranjeet Kumar ,  Meer Nazmus Sakib ,  Haisheng Rong ,  Kimchau Nguyen ,  Mengyuan Huang ,  Aliasghar Eftekhar ,  Christian Malouin ,  Siamak Amiralizadeh Asl ,  Saeed Fathololoumi ,  Ling Liao ,  Yuliya Akulova ,  Olufemi Dosunmu ,  Ansheng Liu

IPC: H01S5/50 ,  G02B27/28 ,  H01S5/026 ,  H01S5/30

Abstract: Embodiments of the present disclosure are directed to a silicon photonics integrated apparatus that includes an input to receive an optical signal, a splitter optically coupled to the input to split the optical signal at a first path and a second path, a polarization beam splitter and rotator (PBSR) optically coupled with the first path or the second path, and a semiconductor optical amplifier (SOA) optically coupled with the first path or the second path and disposed between the splitter and the PBSR. Other embodiments may be described and/or claimed.

公开(公告)号：US20170288780A1

公开(公告)日：2017-10-05

申请号：US15087344

申请日：2016-03-31

Applicant: Intel Corporation

Inventor： Myung Jin Yim ,  Quan A. Tran ,  SeungJae Lee ,  Sandeep Razdan ,  Yigit O. Yilmaz ,  Pradeep Srinivasan ,  Jincheng Wang ,  Ansheng Liu

IPC: H04B10/50 ,  H01S3/10 ,  H01S3/02 ,  H01S3/23

CPC classification number: H04B10/503 ,  H01L2224/73204 ,  H01S3/2375 ,  H01S5/021 ,  H01S5/02248 ,  H01S5/4087

Abstract: Apparatuses including integrated circuit (IC) optical assemblies and processes for fabrication of IC optical assemblies are disclosed herein. In some embodiments, the IC optical assemblies include an optical transmitter component electrically coupled to a first portion of a packaging substrate. The IC optical assemblies further include an optical transmitter driver component between the optical transmitter component and a second portion of the packaging substrate, wherein a first side of the optical transmitter driver component is electrically coupled to the optical transmitter component. The IC optical assemblies further include a plurality of bumps between a second side of the optical transmitter driver component and proximate the second portion of the packaging substrate, wherein the plurality of bumps are not directly coupled to the optical transmitter driver component.

公开(公告)号：US20210302652A1

公开(公告)日：2021-09-30

申请号：US17343280

申请日：2021-06-09

Applicant: Intel Corporation

Inventor： Boris M. Vulovic ,  Tiehui Su ,  Nutan Gautam ,  Wenhua Lin ,  Mehbuba Tanzid ,  Ansheng Liu ,  Wei Qian

IPC: G02B6/12

Abstract: Techniques for photonic demultiplexers are disclosed. In the illustrative embodiment, an output of an unbalanced interferometer formed from waveguides is positioned to the input of a slab grating, with several output waveguides collecting light in different wavelength ranges to create different channels for the demultiplexer system. In some embodiments, one or more auxiliary structures may be positioned near the input of the grating to change the structure of the spatial modes being provided as an input to the grating in order to alter the spectra of the output channels.