公开(公告)号：US10514927B2

公开(公告)日：2019-12-24

申请号：US15121348

申请日：2014-03-27

Applicant: Intel Corporation

Inventor： Anton Lechanka ,  Andrey Efimov ,  Sergey Y. Shishlov ,  Andrey Kluchnikov ,  Kamil Garifullin ,  Igor Burovenko ,  Boris A. Babayan

IPC: G06F9/30 ,  G06F9/38

Abstract: A processor includes logic to execute an instruction stream out-of-order. The instruction stream is divided into a plurality of strands and its instructions and those within the streams are ordered by program order (PO). The processor further includes logic to identify an oldest undispatched instruction in the instruction stream and record its associated PO as an executed instruction pointer, identify a most recently committed store instruction in the instruction stream and record its associated PO as a store commitment pointer, a search pointer with PO less than the execution instruction pointer, identify a first set of store instructions in a store buffer with PO less than the search pointer and eligible for commitment, evaluate whether the first set of store instructions is larger than a number of read ports of the store buffer, and adjust the search pointer.