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公开(公告)号:US12224253B2
公开(公告)日:2025-02-11
申请号:US17480064
申请日:2021-09-20
Applicant: Intel Corporation
Inventor: Xin Ning , Brandon C. Marin , Kyu Oh Lee , Siddharth K. Alur , Numair Ahmed , Brent Williams , Mollie Stewart , Nathan Ou , Cary Kuliasha
IPC: H01L23/64 , H01F27/28 , H01L21/48 , H01L23/498 , H01L49/02
Abstract: Transmission pathways in substrates, and associated methods are shown. Example transmission pathways include a semiconductor substrate with a core, a dielectric layer fixed on the core, at least one first electrical transmission pathway extending through at least one of the dielectric layer and the core. The first pathway includes a magnetic material disposed within the at least the core of the at least one first electrical transmission pathway, at least one second electrical transmission pathway extending through the magnetic material, a nickel layer disposed on inner circumferential surface of the magnetic material at least within the second electrical transmission pathway, a copper layer disposed on at least the nickel layer within the second electrical transmission pathway. The dielectric spacer or the nickel layer separates the copper layer from the magnetic material. At least one third pathway extends through at least one of the dielectric layer and the core separate from the at least one electrical transmission pathway.
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公开(公告)号:US20230092492A1
公开(公告)日:2023-03-23
申请号:US17480064
申请日:2021-09-20
Applicant: Intel Corporation
Inventor: Xin Ning , Brandon C. Marin , Kyu Oh Lee , Siddharth K. Alur , Numair Ahmed , Brent Williams , Mollie Stewart , Nathan Ou , Cary Kuliasha
IPC: H01L23/64 , H01F27/28 , H01L49/02 , H01L23/498 , H01L21/48
Abstract: Transmission pathways in substrates, and associated methods are shown. Example transmission pathways include a semiconductor substrate with a core, a dielectric layer fixed on the core, at least one first electrical transmission pathway extending through at least one of the dielectric layer and the core. The first pathway includes a magnetic material disposed within the at least the core of the at least one first electrical transmission pathway, at least one second electrical transmission pathway extending through the magnetic material, a nickel layer disposed on inner circumferential surface of the magnetic material at least within the second electrical transmission pathway, a copper layer disposed on at least the nickel layer within the second electrical transmission pathway. The dielectric spacer or the nickel layer separates the copper layer from the magnetic material. At least one third pathway extends through at least one of the dielectric layer and the core separate from the at least one electrical transmission pathway.
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公开(公告)号:US20240114622A1
公开(公告)日:2024-04-04
申请号:US17956338
申请日:2022-09-29
Applicant: Intel Corporation
Inventor: Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Tarek A. Ibrahim , Cary Kuliasha , Siddharth K. Alur , Jung Kyu Han , Beomseok Choi , Russell K. Mortensen , Andrew Collins , Haobo Chen , Brandon C. Marin
IPC: H05K1/18 , H01L23/498 , H01L23/538 , H01L23/64 , H01L25/065 , H05K3/00 , H05K3/46
CPC classification number: H05K1/185 , H01L23/49822 , H01L23/5389 , H01L23/645 , H01L25/0655 , H05K3/0047 , H05K3/4644 , H05K2201/1003 , H05K2201/10674
Abstract: An electronic device includes a substrate including a core layer; a cavity formed in the core layer, wherein the cavity includes sidewalls plated with a conductive material; a prefabricated passive electronic component disposed in the cavity; and a cavity sidewall connection providing electrical continuity from the plated cavity sidewalls to a first surface of the substrate and to a second surface of the substrate.
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公开(公告)号:US20230317642A1
公开(公告)日:2023-10-05
申请号:US17707523
申请日:2022-03-29
Applicant: Intel Corporation
Inventor: Numair Ahmed , Cary Kuliasha , Kyu Oh Lee , Jung Kyu Han
IPC: H01L23/64 , H01L23/498 , H01L49/02 , H01L21/48
CPC classification number: H01L23/645 , H01L23/49827 , H01L21/486 , H01L28/10 , H01L23/49838
Abstract: A substrate for an electronic device may include a core. The substrate may include a passive electronic component. For instance, the substrate may include a continuous layer of molding material encapsulating the passive electronic component within the core. One or more through vias may extend between a first surface of the core and a second surface of the core. The substrate may include one or more layers coupled with the core. One or more component terminals may facilitate electrical communication between the passive electronic component and one or more of the first layer or the second layer.
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