公开(公告)号：US12088695B2

公开(公告)日：2024-09-10

申请号：US17558627

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： David Kehlet ,  Shuanghong Sun ,  Saikumar Jayaraman ,  Fariaz Karim

IPC: H04L9/08 ,  G06F7/58 ,  H04L9/32

CPC classification number: H04L9/0825 ,  G06F7/586 ,  H04L9/0866 ,  H04L9/3247 ,  H04L9/3263

Abstract: A first semiconductor device includes a processor configured to generate a random number at initial test of a second semiconductor device after fabrication of the second semiconductor device in a supply chain related to the second semiconductor device, and send the generated random number to the second semiconductor device. The processor is further configured to receive a first signature that is signed over the sent random number by the second semiconductor device using a first private key that is stored in the second semiconductor device, among a first private and public key pair, and test the received first signature, using a first public key that is stored in the first semiconductor device, among the first private and public key pair, to determine whether the second semiconductor device is authenticated.

公开(公告)号：US20230222274A1

公开(公告)日：2023-07-13

申请号：US18124259

申请日：2023-03-21

Applicant: Intel Corporation

Inventor： David Kehlet ,  Nij Dorairaj

IPC: G06F30/323

CPC classification number: G06F30/323

Abstract: A computer system is provided for protecting a circuit design for an application specific integrated circuit. The computer system includes a logic circuit replacement tool for identifying a module of logic circuitry for replacement in at least a portion of the circuit design. The logic circuit replacement tool generates a transformed circuit design for the application specific integrated circuit by replacing the logic circuitry in the module with a configurable circuit that performs a logic function of the logic circuitry when a bitstream stored in storage circuits in the configurable circuit configures the configurable circuit. The transformed circuit design includes the configurable circuit in the module.

公开(公告)号：US12118282B2

公开(公告)日：2024-10-15

申请号：US17551318

申请日：2021-12-15

Applicant: University of Florida Research Foundation, Incorporated ,  Intel Corporation

Inventor： Swarup Bhunia ,  Abdulrahman Alaql ,  Nij Dorairaj ,  David Kehlet

IPC: G06F30/327 ,  G06F9/448 ,  G06F30/34 ,  G06F119/06

CPC classification number: G06F30/327 ,  G06F9/4498 ,  G06F30/34 ,  G06F2119/06

Abstract: In general, embodiments of the present disclosure provide methods, apparatus, systems, computer program products, computing devices, computing entities, and/or the like for altering a design of a hardware intellectual property (IP). In accordance with various embodiments, a representation of the design of the hardware IP is converted to generate a control and data flow graph (CDFG) for the design. An entropy analysis of the CDFG is conducted to identify one or more control paths and/or data paths for removal. Responsive to identifying control path(s) for removal, control logic for the control path(s) is removed from the design and replaced with first reconfigurable logic. Responsive to identifying data path(s) for removal, datapath logic for the data path(s) is removed from the design and replaced with second reconfigurable logic. Logic synthesis is then performed on the design, along with verification to check functional correctness of the design of the hardware.

公开(公告)号：US20210294953A1

公开(公告)日：2021-09-23

申请号：US17337824

申请日：2021-06-03

Applicant: Intel Corporation

Inventor： Nij Dorairaj ,  David Kehlet

IPC: G06F30/343 ,  G06F30/347 ,  G06F30/327 ,  G06F30/392 ,  G06F30/394

Abstract: Methods and systems are provided for protecting a circuit design for an integrated circuit. Logic circuits are identified in at least a portion of the circuit design for replacement. The logic circuits in the circuit design are replaced with a bitstream and configurable circuits that comprise memory circuits. A transformed circuit design is generated for the integrated circuit that comprises the configurable circuits. The configurable circuits in the transformed circuit design perform logic functions of the logic circuits when the bitstream is stored in the memory circuits in the configurable circuits.

公开(公告)号：US20240311537A1

公开(公告)日：2024-09-19

申请号：US18120857

申请日：2023-03-13

Applicant: Intel Corporation

Inventor： David Kehlet ,  Nij Dorairaj ,  Shuanghong Sun

IPC: G06F30/31

CPC classification number: G06F30/31

Abstract: A computer system is provided for protecting an original circuit design for an integrated circuit. The computer system includes a logic circuit replacement tool that generates a redacted circuit design for the integrated circuit by replacing logic circuits in the original circuit design with first and second configurable circuits that perform logic functions of the logic circuits when a bitstream stored in storage circuits configures the first and the second configurable circuits. The logic circuit replacement tool couples one of the storage circuits that stores a bit in the bitstream to an input in each of the first and the second configurable circuits in the redacted circuit design.

公开(公告)号：US20240028815A1

公开(公告)日：2024-01-25

申请号：US18375299

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Xiangyong Wang ,  David Kehlet ,  Diana Cristina Ojeda Aristizabal ,  Ian Kuon ,  Mehmet Avci

IPC: G06F30/398

CPC classification number: G06F30/398 ,  G06F2119/12

Abstract: Integrated circuit devices, methods, and circuitry are provided for performing timing analysis for chip-to-chip connections between integrated circuits in a multichip package. A system may include an integrated circuit package and a computing system. The integrated circuit package may have a first integrated circuit connected to a second integrated circuit via a chip-to-chip connection. The chip-to-chip connection may also be connected to a package ball. The computing system may perform timing analysis on a circuit design for the first integrated circuit with respect the chip-to-chip connection based on user-specified parasitic data relating to the connection to the package ball.

公开(公告)号：US11562117B2

公开(公告)日：2023-01-24

申请号：US17337824

申请日：2021-06-03

Applicant: Intel Corporation

Inventor： Nij Dorairaj ,  David Kehlet

IPC: G06F30/30 ,  G06F21/14 ,  G06F30/343 ,  G06F30/347 ,  G06F30/394 ,  G06F30/392 ,  G06F30/327

Abstract: Methods and systems are provided for protecting a circuit design for an integrated circuit. Logic circuits are identified in at least a portion of the circuit design for replacement. The logic circuits in the circuit design are replaced with a bitstream and configurable circuits that comprise memory circuits. A transformed circuit design is generated for the integrated circuit that comprises the configurable circuits. The configurable circuits in the transformed circuit design perform logic functions of the logic circuits when the bitstream is stored in the memory circuits in the configurable circuits.