公开(公告)号：US11506982B2

公开(公告)日：2022-11-22

申请号：US16143206

申请日：2018-09-26

Applicant: Intel Corporation

Inventor： Vahidreza Parichehreh ,  Keith J. Martin ,  Changhua Liu ,  Leonel Arana

IPC: G03F7/20 ,  H01L21/027 ,  G02B5/04 ,  H01L21/3213

Abstract: Embodiments disclosed herein include a lithographic patterning system and methods of using such a system to form a microelectronic device. The lithographic patterning system includes an actinic radiation source, a stage having a surface for supporting a substrate with a resist layer, and a prism with a first surface over the stage, where the first surface has a masked layer and is substantially parallel to the surface of the stage. The prism may have a second surface that is substantially parallel to the first surface. The first and second surfaces are flat surfaces. The prism is a monolithic prism-mask, where an optical path passes through the system and exits the first surface of the prism through the mask layer. The system may include a layer disposed between the mask and resist layers. The mask layer of the prism may pattern the resist layer without an isolated mask layer.

公开(公告)号：US09823273B2

公开(公告)日：2017-11-21

申请号：US13931866

申请日：2013-06-29

Applicant: INTEL CORPORATION

Inventor： Keith J. Martin ,  Kip P. Stevenson ,  Kamil S. Salloum ,  Todd P. Albertson

IPC: G01R3/00 ,  G01R1/067

CPC classification number: G01R3/00 ,  G01R1/06738 ,  Y10T29/49124

Abstract: Probe tip formation is described for die sort and test. In one example, the tips of wires of a test probe head are prepared for use as test probes. The wires are attached to a test probe head substrate. The end opposite the substrate has a tip. The tips of the wires are polished when attached to the test probe head to form a sharpened point.