公开(公告)号：US08886979B2

公开(公告)日：2014-11-11

申请号：US13913864

申请日：2013-06-10

Applicant: Intel Corporation

Inventor： Kevin Safford ,  Rohit Bhatia ,  Chris Bostak ,  Richard Blumberg ,  Blaine Stackhouse ,  Steve Undy

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3203

Abstract: Methods and apparatuses for reducing step loads of processors are disclosed. Method embodiments comprise examining a number of instructions to be processed by a processor to determine the types of instructions that it has, calculating power consumption by in an execution period based on the types of instructions, and limiting the execution to a subset of instructions of the number to control the quantity of power for the execution period. Some embodiments may also create artificial activity to provide a minimum power floor for the processor. Apparatus embodiments comprise instruction type determination logic to determine types of instructions in an incoming instruction stream, a power calculator to calculate power consumption associated with processing a number of instructions in an execution period, and instruction throttling logic to control the power consumption by limiting the number of instructions to be processed in the execution period.

Abstract translation: 公开了减少处理器的步进负载的方法和装置。 方法实施例包括检查要由处理器处理的多个指令以确定其具有的指令的类型，基于指令的类型在执行周期中计算功耗，并将执行限制到指令的子集 号码来控制执行期间的电量。 一些实施例还可以创建人为活动以为处理器提供最小功率层。 装置实施例包括用于确定输入指令流中的指令类型的指令类型确定逻辑，用于计算与在执行周期中处理多个指令相关联的功耗的功率计算器，以及通过限制数量来控制功耗的指令限制逻辑 的执行期间要处理的指令。