公开(公告)号：US20180190634A1

公开(公告)日：2018-07-05

申请号：US15396434

申请日：2016-12-31

Applicant: Intel IP Corporation

Inventor： Russell S. Aoki ,  Casey G. Thielen

IPC: H01L25/18 ,  H01L23/498 ,  H01L23/544 ,  H05K1/18 ,  H05K3/34 ,  H01L25/065 ,  H01L25/00 ,  H01L23/32 ,  B23K1/00

CPC classification number: H01L25/18 ,  H01L23/32 ,  H01L23/544 ,  H01L25/0655 ,  H01L25/50 ,  H01L2223/54426 ,  H05K1/0271 ,  H05K1/181 ,  H05K3/341 ,  H05K3/3494 ,  H05K2201/10378 ,  H05K2201/10522 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/11

Abstract: Configurable semiconductor packages and processes to attain a defined configuration are provided. A configurable semiconductor package includes a base semiconductor package including a semiconductor die mounted on a surface of a package substrate. An expansion package can be mechanically coupled to a mounting member. The expansion package includes a second package substrate and one or more second semiconductor dies that can be surface mounted to the second package substrate. The second package substrate include an array of interconnects that permit coupling (mechanically and/or electrically) the second semiconductor die(s) to the package substrate of the base semiconductor package. The mounting member can mechanically attach to the base semiconductor package, resulting in a package assembly that has the array of interconnects adjacent to another array of interconnects in the package substrate of the base semiconductor package. The expansion package can be coupled to the base semiconductor package via the interconnects, providing expanded functionality relative to the functionality of the base semiconductor package.