公开(公告)号：US20160105983A1

公开(公告)日：2016-04-14

申请号：US14857430

申请日：2015-09-17

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Thomas J. Ribarich ,  Dean Fernando ,  Kevin Moody ,  Dae Keun Park ,  Chuan Cheah

IPC: H05K7/10

CPC classification number: H05K7/1092 ,  H02M3/145 ,  H05K1/117 ,  H05K1/141 ,  H05K3/366 ,  H05K2201/048

Abstract: In one implementation, an insertable power unit for plugging into a mother board includes a power module situated on a substrate, and a mounting contact on an extended side of the substrate away from the power module. The mounting contact is electrically coupled to the power module by electrical routing in the substrate. The mounting contact is configured to provide electrical connection between the power module and the mother board.

Abstract translation: 在一个实现中，用于插入母板的可插入动力单元包括位于基板上的功率模块和远离电源模块的基板的延伸侧上的安装触点。 安装触头通过在衬底中的电路径电耦合到功率模块。 安装触头被配置为在电源模块和母板之间提供电连接。

公开(公告)号：US20150279821A1

公开(公告)日：2015-10-01

申请号：US14722974

申请日：2015-05-27

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah ,  Andrew N. Sawle

IPC: H01L25/07 ,  H01L23/492 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L25/074 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/33 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.

Abstract translation: 根据示例性实施例，堆叠半桥封装包括控制晶体管，其具有用于连接到高电压输入的控制漏极，耦合到公共导电夹子的控制源和用于由驱动器IC驱动的控制栅极。 堆叠的半桥封装还包括具有用于连接到公共导电夹子的同步漏极的同步晶体管，耦合到低电压输入的同步源以及由驱动器IC驱动的同步栅极。 控制和同步晶体管堆叠在公共导电夹的相对侧上，其中公共导电夹将电源和机械耦合控制源与同步漏极，其中公共导电夹具有用于提供到输出端的电气和机械连接的导电腿 终端引线框架。

公开(公告)号：US09048230B2

公开(公告)日：2015-06-02

申请号：US14221518

申请日：2014-03-21

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah ,  Andrew N. Sawle

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L25/074 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/33 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.

Abstract translation: 根据示例性实施例，堆叠半桥封装包括控制晶体管，其具有用于连接到高电压输入的控制漏极，耦合到公共导电夹子的控制源和用于由驱动器IC驱动的控制栅极。 堆叠的半桥封装还包括具有用于连接到公共导电夹子的同步漏极的同步晶体管，耦合到低电压输入的同步源以及由驱动器IC驱动的同步栅极。 控制和同步晶体管堆叠在公共导电夹子的相对侧上，其中公共导电夹将电源和机械耦合控制源与同步漏极，其中公共导电夹具具有用于提供到输出端的电和机械连接的导电腿 终端引线框架。

公开(公告)号：US20160104697A1

公开(公告)日：2016-04-14

申请号：US14849178

申请日：2015-09-09

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah

IPC: H01L25/18 ,  H01L23/538 ,  H01L23/04 ,  H01L23/58 ,  H01L29/78 ,  H01L29/20 ,  H01L29/16 ,  H01L25/07 ,  H01L29/778

CPC classification number: H01L23/04 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/5386 ,  H01L23/58 ,  H01L25/074 ,  H01L25/115 ,  H01L25/117 ,  H01L25/18 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7827 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

Abstract: There are disclosed herein various implementations of a compact high-voltage semiconductor package. In one exemplary implementation, such a semiconductor package includes a power transistor, as well as a drain contact, a source contact, and a gate contact to provide external connections to the power transistor. The semiconductor package also includes a contour element formed between the drain contact and the source contact in the semiconductor package. The contour element increases a creepage distance between the drain contact and the source contact in the semiconductor package so as to increase a breakdown voltage of the semiconductor package.

Abstract translation: 这里公开了紧凑型高压半导体封装的各种实现方式。 在一个示例性实施例中，这种半导体封装包括功率晶体管以及漏极接触，源极接触和栅极接触，以提供到功率晶体管的外部连接。 半导体封装还包括形成在半导体封装中的漏极接触和源极接触之间的轮廓元件。 轮廓元件增加了半导体封装中的漏极接触和源极接触之间的爬电距离，以增加半导体封装的击穿电压。

公开(公告)号：US09142503B2

公开(公告)日：2015-09-22

申请号：US14333401

申请日：2014-07-16

Applicant: International Rectifier Corporation

Inventor： Chuan Cheah ,  Dae Keun Park

IPC: H01L21/331 ,  H01L21/60 ,  H01L23/498 ,  H01L23/495 ,  H01L25/18 ,  H03K17/567 ,  H03K17/687 ,  H03K17/74 ,  H01L23/00 ,  H01L21/56 ,  H01L25/07 ,  H01L29/20 ,  H01L29/778 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L23/49844 ,  H01L21/56 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/97 ,  H01L25/074 ,  H01L25/18 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/872 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/06181 ,  H01L2224/32145 ,  H01L2224/37147 ,  H01L2224/40145 ,  H01L2224/40225 ,  H01L2224/73263 ,  H01L2224/92246 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/15787 ,  H03K17/567 ,  H03K17/687 ,  H03K17/74 ,  H03K2017/6875 ,  H01L2224/84 ,  H01L2224/83 ,  H01L2924/00

Abstract: Some exemplary embodiments of high voltage cascoded III-nitride semiconductor package utilizing clips on a package support surface have been disclosed. One exemplary embodiment comprises a III-nitride transistor attached to a package support surface and having an anode of a diode stacked over a source of the III-nitride transistor, a first conductive clip coupled to a gate of the III-nitride transistor and the anode of the diode, and a second conductive clip coupled to a drain of the III-nitride transistor. The conductive clips are connected to the package support surface and expose respective flat portions that are surface mountable. In this manner, reduced package footprint, improved surge current capability, and higher performance may be achieved compared to conventional wire bonded packages. Furthermore, since a low cost printed circuit board (PCB) may be utilized for the package support surface, expensive leadless fabrication processes may be avoided for cost effective manufacturing.

Abstract translation: 已经公开了利用封装支撑表面上的夹子的高压级联III族氮化物半导体封装的一些示例性实施例。 一个示例性实施例包括附接到封装支撑表面并具有堆叠在III族氮化物晶体管的源极上的二极管的阳极的III族氮化物晶体管，耦合到III族氮化物晶体管的栅极的第一导电夹和阳极 并且耦合到III族氮化物晶体管的漏极的第二导电夹。 导电夹子连接到封装支撑表面并暴露出可表面安装的相应的平坦部分。 以这种方式，与传统的导线接合封装相比，可以实现减小的封装占地面积，改进的浪涌电流能力和更高的性能。 此外，由于可以将低成本印刷电路板（PCB）用于封装支撑表面，因此可以避免昂贵的无引线制造工艺以实现成本有效的制造。

公开(公告)号：US20150194369A1

公开(公告)日：2015-07-09

申请号：US14663276

申请日：2015-03-19

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/16

CPC classification number: H01L23/49517 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L25/165 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10323 ,  H01L2924/1033 ,  H01L2924/10334 ,  H01L2924/10344 ,  H01L2924/10346 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: One exemplary disclosed embodiment comprises a high power semiconductor package configured as a buck converter having a control transistor and a sync transistor disposed on a common leadframe pad, a driver integrated circuit (IC) for driving the control and sync transistors, and conductive clips electrically coupling the top surfaces of the transistors to substrate pads such as leadframe pads. In this manner, the leadfirame and the conductive clips provide efficient grounding or current conduction by direct mechanical connection and large surface area conduction, thereby enabling a package with significantly reduced electrical resistance, form factor, complexity, and cost when compared to conventional packaging methods using wirebonds for transistor interconnections.

Abstract translation: 一个示例性的公开的实施例包括被配置为具有控制晶体管和设置在公共引线框焊盘上的同步晶体管的降压转换器的高功率半导体封装，用于驱动控制和同步晶体管的驱动器集成电路（IC） 晶体管的顶表面到衬底焊盘，例如引线框焊盘。 以这种方式，引线框和导电夹可以通过直接的机械连接和大的表面积传导来提供有效的接地或电流传导，从而使得与传统的封装方法相比，具有显着降低的电阻，形状因素，复杂性和成本的封装 用于晶体管互连的引线。

公开(公告)号：US20140327014A1

公开(公告)日：2014-11-06

申请号：US14333401

申请日：2014-07-16

Applicant: International Rectifier Corporation

Inventor： Chuan Cheah ,  Dae Keun Park

IPC: H01L23/498

CPC classification number: H01L23/49844 ,  H01L21/56 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/97 ,  H01L25/074 ,  H01L25/18 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/872 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/06181 ,  H01L2224/32145 ,  H01L2224/37147 ,  H01L2224/40145 ,  H01L2224/40225 ,  H01L2224/73263 ,  H01L2224/92246 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/15787 ,  H03K17/567 ,  H03K17/687 ,  H03K17/74 ,  H03K2017/6875 ,  H01L2224/84 ,  H01L2224/83 ,  H01L2924/00

Abstract: Some exemplary embodiments of high voltage cascoded III-nitride semiconductor package utilizing clips on a package support surface have been disclosed. One exemplary embodiment comprises a III-nitride transistor attached to a package support surface and having an anode of a diode stacked over a source of the III-nitride transistor, a first conductive clip coupled to a gate of the III-nitride transistor and the anode of the diode, and a second conductive clip coupled to a drain of the III-nitride transistor. The conductive clips are connected to the package support surface and expose respective flat portions that are surface mountable. In this manner, reduced package footprint, improved surge current capability, and higher performance may be achieved compared to conventional wire bonded packages. Furthermore, since a low cost printed circuit board (PCB) may be utilized for the package support surface, expensive leadless fabrication processes may be avoided for cost effective manufacturing.

Abstract translation: 已经公开了利用封装支撑表面上的夹子的高压级联III族氮化物半导体封装的一些示例性实施例。 一个示例性实施例包括附接到封装支撑表面并具有堆叠在III族氮化物晶体管的源极上的二极管的阳极的III族氮化物晶体管，耦合到III族氮化物晶体管的栅极的第一导电夹和阳极 并且耦合到III族氮化物晶体管的漏极的第二导电夹。 导电夹子连接到封装支撑表面并暴露出可表面安装的相应的平坦部分。 以这种方式，与传统的导线接合封装相比，可以实现减小的封装占地面积，改进的浪涌电流能力和更高的性能。 此外，由于可以将低成本印刷电路板（PCB）用于封装支撑表面，因此可以避免昂贵的无引线制造工艺以实现成本有效的制造。

公开(公告)号：US20140084431A1

公开(公告)日：2014-03-27

申请号：US14057385

申请日：2013-10-18

Applicant: International Rectifier Corporation

Inventor： Michael A. Briere ,  Chuan Cheah ,  Kunzhong Hu

IPC: H01L23/495 ,  H01L23/367

CPC classification number: H01L23/495 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49568 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253

Abstract: A semiconductor package that includes a semiconductor die and a heat spreader thermally coupled to the semiconductor and disposed at least partially within the molded housing of the package.

Abstract translation: 一种半导体封装，其包括半导体管芯和散热器，所述散热器热耦合到所述半导体并且至少部分地设置在所述封装的模制外壳内。

公开(公告)号：US08853744B2

公开(公告)日：2014-10-07

申请号：US13804395

申请日：2013-03-14

Applicant: International Rectifier Corporation

Inventor： Chuan Cheah ,  Michael A. Briere

IPC: H01L29/66

CPC classification number: H01L29/41758 ,  H01L23/293 ,  H01L23/4824 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L27/088 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/4175 ,  H01L29/452 ,  H01L29/7787 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05022 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05563 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/05639 ,  H01L2224/0603 ,  H01L2224/0615 ,  H01L2224/0616 ,  H01L2224/06177 ,  H01L2224/131 ,  H01L2224/29005 ,  H01L2224/29014 ,  H01L2224/29023 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/3003 ,  H01L2224/3015 ,  H01L2224/30177 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/19041 ,  H02M3/158 ,  H01L2924/01028 ,  H01L2924/00

Abstract: Some exemplary embodiments of a III-nitride power device including a HEMT with multiple interconnect metal layers and a solderable front metal structure using solder bars for external circuit connections have been disclosed. The solderable front metal structure may comprise a tri-metal such as TiNiAg, and may be configured to expose source and drain contacts of the HEMT as alternating elongated digits or bars. Additionally, a single package may integrate multiple such HEMTs wherein the front metal structures expose alternating interdigitated source and drain contacts, which may be advantageous for DC-DC power conversion circuit designs using III-nitride devices. By using solder bars for external circuit connections, lateral conduction is enabled, thereby advantageously reducing device Rdson.

Abstract translation: 已经公开了包括具有多个互连金属层的HEMT和使用用于外部电路连接的焊料条的可焊接前金属结构的III族氮化物功率器件的一些示例性实施例。 可焊接的前金属结构可以包括诸如TiNiAg的三金属，并且可以被配置为暴露HEMT的源极和漏极触点作为交替的细长数字或条。 另外，单个封装可以集成多个这样的HEMT，其中前金属结构暴露出交替的指示的源极和漏极触点，这对于使用III族氮化物器件的DC-DC功率转换电路设计是有利的。 通过使用焊条进行外部电路连接，可以进行横向导通，从而有利于减少器件Rdson。

公开(公告)号：US20140203419A1

公开(公告)日：2014-07-24

申请号：US14221518

申请日：2014-03-21

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah ,  Andrew N. Sawle

IPC: H01L23/495

CPC classification number: H01L25/074 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/33 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.

Abstract translation: 根据示例性实施例，堆叠半桥封装包括控制晶体管，其具有用于连接到高电压输入的控制漏极，耦合到公共导电夹子的控制源和用于由驱动器IC驱动的控制栅极。 堆叠的半桥封装还包括具有用于连接到公共导电夹子的同步漏极的同步晶体管，耦合到低电压输入的同步源以及由驱动器IC驱动的同步栅极。 控制和同步晶体管堆叠在公共导电夹的相对侧上，其中公共导电夹将电源和机械耦合控制源与同步漏极，其中公共导电夹具有用于提供到输出端的电气和机械连接的导电腿 终端引线框架。