公开(公告)号：US20170243980A1

公开(公告)日：2017-08-24

申请号：US15582823

申请日：2017-05-01

Applicant: JSR Corporation

Inventor： Hitoshi HAMAGUCHI ,  Kenrou TANAKA ,  Kenzou OOKITA ,  Keisuke KURIYAMA

IPC: H01L29/786 ,  H01L21/288 ,  H01L29/66

CPC classification number: H01L29/78636 ,  H01L21/28 ,  H01L21/288 ,  H01L29/66742 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7869

Abstract: The thin film transistor includes a first insulating layer provided on a substrate; a source electrode and a drain electrode that are provided on the first insulating layer; a semiconductor layer provided so as to cover the first insulating layer, the source electrode, and the drain electrode; a second insulating layer provided on the semiconductor layer; and a gate electrode provided on the second insulating layer, in which the first insulating layer is formed of a hydrophilic/hydrophobic material and has a recess portion, and the source electrode and the drain electrode are provided so as to fill the recess portion of the first insulating layer.

公开(公告)号：US20170306481A1

公开(公告)日：2017-10-26

申请号：US15509662

申请日：2015-09-08

Applicant: JSR CORPORATION

Inventor： Hitoshi HAMAGUCHI ,  Kenrou TANAKA ,  Kenzou OOKITA ,  Keisuke KURIYAMA

IPC: C23C16/44 ,  H05K3/00 ,  G03F7/20 ,  G03F7/039 ,  C23C16/56 ,  C09D133/16 ,  C09D133/14 ,  C09D133/10 ,  C09D129/10 ,  H05K3/12 ,  B05D3/06

CPC classification number: C23C16/44 ,  B05D3/06 ,  B29C59/16 ,  C08F257/00 ,  C08F265/04 ,  C08F289/00 ,  C08J7/047 ,  C08J2355/02 ,  C08J2369/00 ,  C09D129/10 ,  C09D133/10 ,  C09D133/14 ,  C09D133/16 ,  C09D151/003 ,  C23C16/56 ,  G03F7/0046 ,  G03F7/039 ,  G03F7/0392 ,  G03F7/18 ,  G03F7/20 ,  G03F7/24 ,  H05K3/0023 ,  H05K3/12 ,  H05K2201/0166 ,  C08F216/1408

Abstract: The present invention relates to: a method of producing a structure having a recessed pattern; a resin composition; a method of forming an electroconductive film; an electronic circuit; and an electronic device. The method of producing a structure having a recessed pattern includes the following steps (i) and (ii), and the recessed pattern has a film thickness that is thinner by 5% to less than 90% with respect to that of a coating film obtained in the step (i): (i) the step of forming a coating film on a non-flat surface of a structure using a resin composition which includes an acid-dissociable group-containing polymer and an acid generator; and (ii) the step of forming a recess by subjecting a prescribed part of a portion of the coating film to irradiation with radiation.

公开(公告)号：US20160062242A1

公开(公告)日：2016-03-03

申请号：US14888244

申请日：2014-04-15

Applicant: JSR CORPORATION

Inventor： Hitoshi HAMAGUCHI ,  Kenrou TANAKA ,  Kenzou OOKITA ,  Keisuke KURIYAMA

IPC: G03F7/38 ,  H05K1/02 ,  G03F7/039 ,  H05K3/28 ,  G03F7/16 ,  G03F7/20

CPC classification number: G03F7/38 ,  G03F7/0046 ,  G03F7/039 ,  G03F7/0392 ,  G03F7/16 ,  G03F7/20 ,  G03F7/36 ,  H05K1/0296 ,  H05K3/107 ,  H05K3/1208 ,  H05K3/287 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/0166

Abstract: Provided is a method for manufacturing a substrate having a concave pattern to be used for forming a high-definition pattern while suppressing wet-spreading and bleeding of a film-forming ink, provided is a composition to be used for manufacturing the substrate, and provided are a method for forming a conductive film, an electronic circuit, and an electronic device.The method for manufacturing a substrate having a concave pattern includes: (i) a step of applying, on a substrate 1, a composition containing a polymer having an acid-dissociable group and an acid generator to form a coating film 2 and (ii) a step of irradiating a predetermined portion of the coating film 2 with radiation. The method for forming a conductive film includes applying a conductive film-forming ink on the concave pattern formed in the exposed portion of the coating film 2 and heating the ink to form a pattern 6. The electronic circuit and the electronic device are provided by using the method for forming a conductive film.

Abstract translation: 提供一种用于制造用于形成高清晰度图案的凹形图案的基板的方法，同时抑制成膜油墨的湿扩展和渗色，提供用于制造基板的组合物，并且提供 是形成导电膜，电子电路和电子器件的方法。 具有凹形图案的基板的制造方法包括：（i）在基板1上涂布含有具有酸解离基的聚合物和酸发生剂的组合物以形成涂膜2的步骤，（ii） 用辐射照射涂膜2的预定部分的步骤。 形成导电膜的方法包括在形成在涂膜2的暴露部分中的凹形图案上涂覆导电膜形成油墨并加热油墨以形成图案6.电子电路和电子设备通过使用 形成导电膜的方法。