Abstract:
A printed circuit board includes a power plane and a ground reference plane that includes two opposite sides. The power plane is positioned proximate one side of the ground reference plane. A signal layer is positioned proximate the other side of the ground reference plane to isolate the power plane from the signal layer. Any noise on the power plane or the signal layer is thus isolated by the intervening ground plane.
Abstract:
A method and related configuration for attenuating high-frequency noise that may appear on power planes in printed circuit boards. In one embodiment, the noise attenuation means of the present invention involves applying a lower conductivity material between the conductive and dielectric layers within a printed circuit board. High-frequency noise is then attenuated by the skin effect. In another embodiment, the low conductivity material is applied between the power plane and dielectric layer within the printed circuit board. The low conductivity material may be a material, such as nickel or lead, having an electrical conductivity ranging between about 1×104 mhos/m and 5.8×107 mhos/m for layers having a thickness of about 2 mils.
Abstract:
In a method of the present invention, performance characteristics of a printed circuit board are analyzed. The printed circuit board, bypass components and an applied stimulus are modeled. Each of the bypass components includes a capacitor and a resistor in series with each other. Alternatively, a second capacitor is coupled in parallel to the above capacitor and resistor. A simulation of the circuit model is then performed. In this embodiment of the invention, the simulation is responsive to the stimulus as is performed over a range of bypass resistor values. In another embodiment of the invention, a printed circuit board is described with components and characteristics that reduce noise. Such a printed circuit board includes a power plane and a plurality of bypass components. Moreover, the plurality of bypass components include bypass capacitors and bypass resistors coupled in series between the positive power plane and the negative power plane.