Abstract:
A flat panel display device (50) includes magnetic field emitter elements (52). The emitter elements (52) include a dopant ferromagnetic material (56) used to produce a permanent magnet in the emitter elements (52). The permanent magnet in the emitter elements (52) generates a magnetic field (B) used to focus the electrons emitted from the tips of the emitter elements (52). The flat panel display device (50) further includes a voltage source (70) for producing an electric field (E) between a cathode electrode (54) having a gate electrode (58), and an anode electrode (60) having phosphor regions (62) disposed between black matrix regions (61). The magnetic field (B) provides a restoring magnetic force to collimate the electrons toward the phosphor regions (62) to produce a high brightness display.
Abstract:
A retaining apparatus for retaining a semiconductor wafer on the surface of a chuck. The retaining apparatus includes elongate shafts each positioned adjacent to a perimeter of the surface of the chuck and so that a lengthwise axis of each shaft is substantially perpendicular to the surface of the chuck. Two shafts are located on one side of a diameter of the surface of the chuck and two additional shafts are located on another side of the diameter of the surface of the chuck. Retainer members are connected to each of the shafts. The retainer members extend over the surface of the chuck and portions of the semiconductor wafer resting thereon in order to retain the semiconductor wafer thereagainst when the retainer members are in a closed position. Chambers each receive another end of each of the shafts. A vacuum source is coupled to the chambers to provide suction inside the chambers to pull the shafts deeper into their respective chambers so that the retainer members move from an open position where they are spaced apart from the semiconductor wafer to the closed position where they contact portions of the semiconductor wafer. Methods of retaining a semiconductor wafer on a first surface of a chuck and testing a semiconductor wafer are also disclosed.