公开(公告)号：US20190261507A1

公开(公告)日：2019-08-22

申请号：US16279176

申请日：2019-02-19

Applicant: LAPIS Semiconductor Co., Ltd.

Inventor： Kentaro TODA ,  Kenji ARAI ,  Manabu MIYAZAWA ,  Kenichiro NAGATOMO ,  Toru UENO ,  Tsuguto MARUKO ,  Hirofumi OGAWA ,  Tetsuo OOMORI

IPC: H05K1/02 ,  G06F1/26 ,  H01L23/522

CPC classification number: H05K1/0216 ,  H05K1/0231 ,  H05K1/114 ,  H05K1/115 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/10015 ,  H05K2201/10689

Abstract: A circuit board device includes: a printed wiring board; an IC chip provided on an obverse surface of the board and having at least one ground terminal; and a wiring pattern, disposed on the board, for providing a ground potential to the ground terminal of the IC chip. The wiring pattern is disposed on a reverse surface of the printed wiring board. The circuit board device has at least one via that is connected to the wiring pattern and passes through the printed wiring board at a position within a region where the IC chip is mounted on the obverse surface of the printed wiring board.

公开(公告)号：US20180242444A1

公开(公告)日：2018-08-23

申请号：US15900484

申请日：2018-02-20

Applicant: LAPIS Semiconductor Co., Ltd.

Inventor： Kentaro TODA ,  Kenji ARAI ,  Manabu MIYAZAWA ,  Kenichiro NAGATOMO ,  Touru UENO ,  Tsuguto MARUKO ,  Hirofumi OGAWA ,  Tetsuo OOMORI

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/0216 ,  H05K1/0231 ,  H05K1/114 ,  H05K1/115 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/10015 ,  H05K2201/10689

Abstract: A circuit board device includes: a printed wiring board; an IC chip provided on an obverse surface of the board and having at least one ground terminal; and a wiring pattern, disposed on the board, for providing a ground potential to the ground terminal of the IC chip. The wiring pattern is disposed on a reverse surface of the printed wiring board. The circuit board device has at least one via that is connected to the wiring pattern and passes through the printed wiring board at a position within a region where the IC chip is mounted on the obverse surface of the printed wiring board.

公开(公告)号：US20200313673A1

公开(公告)日：2020-10-01

申请号：US16803606

申请日：2020-02-27

Applicant: LAPIS Semiconductor Co., Ltd.

Inventor： Tetsuo OOMORI

IPC: H03K19/003 ,  H03K19/00

Abstract: A logic circuit includes an inverter that outputs from an output terminal a signal created by inverting the logic of a signal input into an input terminal, a first transistor that is connected to the input terminal in such a way as to maintain an OFF state, and a second transistor that is connected to the output terminal in such a way as to maintain an OFF state.